On Wed, Jul 16, 2025 at 11:53:52AM +0200, Luc Michel wrote:
> Refactor the USB controller creation using the VersalMap structure.
> 
> Note that the connection to the CRL is removed for now and will be
> re-added by next commits.
> 
> Signed-off-by: Luc Michel <luc.mic...@amd.com>

Reviewed-by: Francisco Iglesias <francisco.igles...@amd.com>

> ---
>  include/hw/arm/xlnx-versal.h |  5 ---
>  hw/arm/xlnx-versal-virt.c    | 56 +--------------------------
>  hw/arm/xlnx-versal.c         | 74 +++++++++++++++++++++++++++++-------
>  3 files changed, 62 insertions(+), 73 deletions(-)
> 
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index 71c3314b8b4..5d4b30f0ff9 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -17,11 +17,10 @@
>  #include "hw/cpu/cluster.h"
>  #include "hw/or-irq.h"
>  #include "hw/intc/arm_gicv3.h"
>  #include "hw/rtc/xlnx-zynqmp-rtc.h"
>  #include "qom/object.h"
> -#include "hw/usb/xlnx-usb-subsystem.h"
>  #include "hw/nvram/xlnx-bbram.h"
>  #include "hw/nvram/xlnx-versal-efuse.h"
>  #include "hw/ssi/xlnx-versal-ospi.h"
>  #include "hw/dma/xlnx_csu_dma.h"
>  #include "hw/misc/xlnx-versal-crl.h"
> @@ -72,14 +71,10 @@ struct Versal {
>      } noc;
>  
>      struct {
>          MemoryRegion mr_ocm;
>  
> -        struct {
> -            VersalUsb2 usb;
> -        } iou;
> -
>          /* Real-time Processing Unit.  */
>          struct {
>              MemoryRegion mr;
>              MemoryRegion mr_ps_alias;
>  
> diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
> index 1922a90019c..36341b825eb 100644
> --- a/hw/arm/xlnx-versal-virt.c
> +++ b/hw/arm/xlnx-versal-virt.c
> @@ -12,10 +12,11 @@
>  
>  #include "qemu/osdep.h"
>  #include "qemu/error-report.h"
>  #include "qapi/error.h"
>  #include "system/device_tree.h"
> +#include "system/address-spaces.h"
>  #include "hw/block/flash.h"
>  #include "hw/boards.h"
>  #include "hw/sysbus.h"
>  #include "hw/arm/fdt.h"
>  #include "hw/qdev-properties.h"
> @@ -38,12 +39,10 @@ struct VersalVirt {
>      int fdt_size;
>      struct {
>          uint32_t gic;
>          uint32_t clk_125Mhz;
>          uint32_t clk_25Mhz;
> -        uint32_t usb;
> -        uint32_t dwc;
>      } phandle;
>      struct arm_boot_info binfo;
>  
>      CanBusState **canbus;
>  
> @@ -66,12 +65,10 @@ static void fdt_create(VersalVirt *s)
>      /* Allocate all phandles.  */
>      s->phandle.gic = qemu_fdt_alloc_phandle(s->fdt);
>      s->phandle.clk_25Mhz = qemu_fdt_alloc_phandle(s->fdt);
>      s->phandle.clk_125Mhz = qemu_fdt_alloc_phandle(s->fdt);
>  
> -    s->phandle.usb = qemu_fdt_alloc_phandle(s->fdt);
> -    s->phandle.dwc = qemu_fdt_alloc_phandle(s->fdt);
>      /* Create /chosen node for load_dtb.  */
>      qemu_fdt_add_subnode(s->fdt, "/chosen");
>      qemu_fdt_add_subnode(s->fdt, "/aliases");
>  
>      /* Header */
> @@ -152,60 +149,10 @@ static void fdt_add_timer_nodes(VersalVirt *s)
>              GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL2_IRQ, irqflags);
>      qemu_fdt_setprop(s->fdt, "/timer", "compatible",
>                       compat, sizeof(compat));
>  }
>  
> -static void fdt_add_usb_xhci_nodes(VersalVirt *s)
> -{
> -    const char clocknames[] = "bus_clk\0ref_clk";
> -    const char irq_name[] = "dwc_usb3";
> -    const char compatVersalDWC3[] = "xlnx,versal-dwc3";
> -    const char compatDWC3[] = "snps,dwc3";
> -    char *name = g_strdup_printf("/usb@%" PRIx32, MM_USB2_CTRL_REGS);
> -
> -    qemu_fdt_add_subnode(s->fdt, name);
> -    qemu_fdt_setprop(s->fdt, name, "compatible",
> -                         compatVersalDWC3, sizeof(compatVersalDWC3));
> -    qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
> -                                 2, MM_USB2_CTRL_REGS,
> -                                 2, MM_USB2_CTRL_REGS_SIZE);
> -    qemu_fdt_setprop(s->fdt, name, "clock-names",
> -                         clocknames, sizeof(clocknames));
> -    qemu_fdt_setprop_cells(s->fdt, name, "clocks",
> -                               s->phandle.clk_25Mhz, s->phandle.clk_125Mhz);
> -    qemu_fdt_setprop(s->fdt, name, "ranges", NULL, 0);
> -    qemu_fdt_setprop_cell(s->fdt, name, "#address-cells", 2);
> -    qemu_fdt_setprop_cell(s->fdt, name, "#size-cells", 2);
> -    qemu_fdt_setprop_cell(s->fdt, name, "phandle", s->phandle.usb);
> -    g_free(name);
> -
> -    name = g_strdup_printf("/usb@%" PRIx32 "/dwc3@%" PRIx32,
> -                           MM_USB2_CTRL_REGS, MM_USB_0);
> -    qemu_fdt_add_subnode(s->fdt, name);
> -    qemu_fdt_setprop(s->fdt, name, "compatible",
> -                     compatDWC3, sizeof(compatDWC3));
> -    qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
> -                                 2, MM_USB_0, 2, MM_USB_0_SIZE);
> -    qemu_fdt_setprop(s->fdt, name, "interrupt-names",
> -                     irq_name, sizeof(irq_name));
> -    qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
> -                               GIC_FDT_IRQ_TYPE_SPI, VERSAL_USB0_IRQ_0,
> -                               GIC_FDT_IRQ_FLAGS_LEVEL_HI);
> -    qemu_fdt_setprop_cell(s->fdt, name,
> -                          "snps,quirk-frame-length-adjustment", 0x20);
> -    qemu_fdt_setprop_cells(s->fdt, name, "#stream-id-cells", 1);
> -    qemu_fdt_setprop_string(s->fdt, name, "dr_mode", "host");
> -    qemu_fdt_setprop_string(s->fdt, name, "phy-names", "usb3-phy");
> -    qemu_fdt_setprop(s->fdt, name, "snps,dis_u2_susphy_quirk", NULL, 0);
> -    qemu_fdt_setprop(s->fdt, name, "snps,dis_u3_susphy_quirk", NULL, 0);
> -    qemu_fdt_setprop(s->fdt, name, "snps,refclk_fladj", NULL, 0);
> -    qemu_fdt_setprop(s->fdt, name, "snps,mask_phy_reset", NULL, 0);
> -    qemu_fdt_setprop_cell(s->fdt, name, "phandle", s->phandle.dwc);
> -    qemu_fdt_setprop_string(s->fdt, name, "maximum-speed", "high-speed");
> -    g_free(name);
> -}
> -
>  static void fdt_add_rtc_node(VersalVirt *s)
>  {
>      const char compat[] = "xlnx,zynqmp-rtc";
>      const char interrupt_names[] = "alarm\0sec";
>      char *name = g_strdup_printf("/rtc@%x", MM_PMC_RTC);
> @@ -529,11 +476,10 @@ static void versal_virt_init(MachineState *machine)
>  
>      fdt_create(s);
>      versal_set_fdt(&s->soc, s->fdt);
>      fdt_add_gic_nodes(s);
>      fdt_add_timer_nodes(s);
> -    fdt_add_usb_xhci_nodes(s);
>      fdt_add_rtc_node(s);
>      fdt_add_bbram_node(s);
>      fdt_add_efuse_ctrl_node(s);
>      fdt_add_efuse_cache_node(s);
>      fdt_add_cpu_nodes(s, psci_conduit);
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index 6c5eb6d3fd5..4e4df0851e8 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -30,10 +30,11 @@
>  #include "hw/net/xlnx-versal-canfd.h"
>  #include "hw/sd/sdhci.h"
>  #include "hw/net/cadence_gem.h"
>  #include "hw/dma/xlnx-zdma.h"
>  #include "hw/misc/xlnx-versal-xramc.h"
> +#include "hw/usb/xlnx-usb-subsystem.h"
>  
>  #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
>  #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
>  #define GEM_REVISION        0x40070106
>  
> @@ -78,10 +79,17 @@ typedef struct VersalMap {
>          uint64_t ctrl;
>          uint64_t ctrl_stride;
>          int irq;
>          size_t num;
>      } xram;
> +
> +    struct VersalUsbMap {
> +        uint64_t xhci;
> +        uint64_t ctrl;
> +        int irq;
> +    } usb[2];
> +    size_t num_usb;
>  } VersalMap;
>  
>  static const VersalMap VERSAL_MAP = {
>      .uart[0] = { 0xff000000, 18 },
>      .uart[1] = { 0xff010000, 19 },
> @@ -106,10 +114,13 @@ static const VersalMap VERSAL_MAP = {
>          .num = 4,
>          .mem = 0xfe800000, .mem_stride = 1 * MiB,
>          .ctrl = 0xff8e0000, .ctrl_stride = 0x10000,
>          .irq = 79,
>      },
> +
> +    .usb[0] = { .xhci = 0xfe200000, .ctrl = 0xff9d0000, .irq = 22 },
> +    .num_usb = 1,
>  };
>  
>  static const VersalMap *VERSION_TO_MAP[] = {
>      [VERSAL_VER_VERSAL] = &VERSAL_MAP,
>  };
> @@ -420,33 +431,71 @@ static void versal_create_canfd(Versal *s, const 
> VersalSimplePeriphMap *map,
>      qemu_fdt_setprop_cells(s->cfg.fdt, node, "interrupts",
>                             GIC_FDT_IRQ_TYPE_SPI, map->irq,
>                             GIC_FDT_IRQ_FLAGS_LEVEL_HI);
>  }
>  
> -static void versal_create_usbs(Versal *s, qemu_irq *pic)
> +static void versal_create_usb(Versal *s,
> +                              const struct VersalUsbMap *map)
>  {
>      DeviceState *dev;
>      MemoryRegion *mr;
> +    g_autofree char *node, *subnode;
> +    const char clocknames[] = "bus_clk\0ref_clk";
> +    const char irq_name[] = "dwc_usb3";
> +    const char compat_versal_dwc3[] = "xlnx,versal-dwc3";
> +    const char compat_dwc3[] = "snps,dwc3";
>  
> -    object_initialize_child(OBJECT(s), "usb2", &s->lpd.iou.usb,
> -                            TYPE_XILINX_VERSAL_USB2);
> -    dev = DEVICE(&s->lpd.iou.usb);
> +    dev = qdev_new(TYPE_XILINX_VERSAL_USB2);
> +    object_property_add_child(OBJECT(s), "usb[*]", OBJECT(dev));
>  
>      object_property_set_link(OBJECT(dev), "dma", OBJECT(&s->mr_ps),
>                               &error_abort);
>      qdev_prop_set_uint32(dev, "intrs", 1);
>      qdev_prop_set_uint32(dev, "slots", 2);
>  
> -    sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
> +    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
>  
>      mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
> -    memory_region_add_subregion(&s->mr_ps, MM_USB_0, mr);
> +    memory_region_add_subregion(&s->mr_ps, map->xhci, mr);
>  
> -    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[VERSAL_USB0_IRQ_0]);
> +    versal_sysbus_connect_irq(s, SYS_BUS_DEVICE(dev), 0, map->irq);
>  
>      mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
> -    memory_region_add_subregion(&s->mr_ps, MM_USB2_CTRL_REGS, mr);
> +    memory_region_add_subregion(&s->mr_ps, map->ctrl, mr);
> +
> +    node = versal_fdt_add_simple_subnode(s, "/usb", map->ctrl, 0x10000,
> +                                         compat_versal_dwc3,
> +                                         sizeof(compat_versal_dwc3));
> +    qemu_fdt_setprop(s->cfg.fdt, node, "clock-names",
> +                         clocknames, sizeof(clocknames));
> +    qemu_fdt_setprop_cells(s->cfg.fdt, node, "clocks",
> +                               s->phandle.clk_25mhz, s->phandle.clk_125mhz);
> +    qemu_fdt_setprop(s->cfg.fdt, node, "ranges", NULL, 0);
> +    qemu_fdt_setprop_cell(s->cfg.fdt, node, "#address-cells", 2);
> +    qemu_fdt_setprop_cell(s->cfg.fdt, node, "#size-cells", 2);
> +
> +    subnode = g_strdup_printf("/%s/dwc3", node);
> +    g_free(node);
> +
> +    node = versal_fdt_add_simple_subnode(s, subnode, map->xhci, 0x10000,
> +                                         compat_dwc3,
> +                                         sizeof(compat_dwc3));
> +    qemu_fdt_setprop(s->cfg.fdt, node, "interrupt-names",
> +                     irq_name, sizeof(irq_name));
> +    qemu_fdt_setprop_cells(s->cfg.fdt, node, "interrupts",
> +                               GIC_FDT_IRQ_TYPE_SPI, map->irq,
> +                               GIC_FDT_IRQ_FLAGS_LEVEL_HI);
> +    qemu_fdt_setprop_cell(s->cfg.fdt, node,
> +                          "snps,quirk-frame-length-adjustment", 0x20);
> +    qemu_fdt_setprop_cells(s->cfg.fdt, node, "#stream-id-cells", 1);
> +    qemu_fdt_setprop_string(s->cfg.fdt, node, "dr_mode", "host");
> +    qemu_fdt_setprop_string(s->cfg.fdt, node, "phy-names", "usb3-phy");
> +    qemu_fdt_setprop(s->cfg.fdt, node, "snps,dis_u2_susphy_quirk", NULL, 0);
> +    qemu_fdt_setprop(s->cfg.fdt, node, "snps,dis_u3_susphy_quirk", NULL, 0);
> +    qemu_fdt_setprop(s->cfg.fdt, node, "snps,refclk_fladj", NULL, 0);
> +    qemu_fdt_setprop(s->cfg.fdt, node, "snps,mask_phy_reset", NULL, 0);
> +    qemu_fdt_setprop_string(s->cfg.fdt, node, "maximum-speed", "high-speed");
>  }
>  
>  static void versal_create_gem(Versal *s,
>                                const struct VersalGemMap *map)
>  {
> @@ -1009,14 +1058,10 @@ static void versal_create_crl(Versal *s, qemu_irq 
> *pic)
>          object_property_set_link(OBJECT(&s->lpd.crl),
>                                   name, OBJECT(&s->lpd.rpu.cpu[i]),
>                                   &error_abort);
>      }
>  
> -    object_property_set_link(OBJECT(&s->lpd.crl),
> -                             "usb", OBJECT(&s->lpd.iou.usb),
> -                             &error_abort);
> -
>      sysbus_realize(sbd, &error_fatal);
>      memory_region_add_subregion(&s->mr_ps, MM_CRL,
>                                  sysbus_mmio_get_region(sbd, 0));
>      sysbus_connect_irq(sbd, 0, pic[VERSAL_CRL_IRQ]);
>  }
> @@ -1198,11 +1243,14 @@ static void versal_realize(DeviceState *dev, Error 
> **errp)
>          versal_create_zdma(s, &map->zdma[i]);
>      }
>  
>      versal_create_xrams(s, &map->xram);
>  
> -    versal_create_usbs(s, pic);
> +    for (i = 0; i < map->num_usb; i++) {
> +        versal_create_usb(s, &map->usb[i]);
> +    }
> +
>      versal_create_pmc_apb_irq_orgate(s, pic);
>      versal_create_rtc(s, pic);
>      versal_create_trng(s, pic);
>      versal_create_bbram(s, pic);
>      versal_create_efuse(s, pic);
> -- 
> 2.50.0
> 

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