Add ARM_CP_128BIT for type and functions describing 128-bit access.
Signed-off-by: Richard Henderson <[email protected]>
---
target/arm/cpregs.h | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/target/arm/cpregs.h b/target/arm/cpregs.h
index 9818be4429..90f14dbb18 100644
--- a/target/arm/cpregs.h
+++ b/target/arm/cpregs.h
@@ -136,6 +136,8 @@ enum {
* identically to the normal one, other than FGT trapping handling.)
*/
ARM_CP_ADD_TLBI_NXS = 1 << 21,
+ /* Flag: For ARM_CP_STATE_AA64, sysreg is 128-bit. */
+ ARM_CP_128BIT = 1 << 22,
};
/*
@@ -178,6 +180,10 @@ enum {
#define CP_REG_AA32_NS_SHIFT 29
#define CP_REG_AA32_NS_MASK (1 << CP_REG_AA32_NS_SHIFT)
+/* Distinguish 64-bit and 128-bit views of AArch64 system registers. */
+#define CP_REG_AA64_128BIT_SHIFT 30
+#define CP_REG_AA64_128BIT_MASK (1 << CP_REG_AA64_128BIT_SHIFT)
+
/* Distinguish 32-bit and 64-bit views of AArch32 system registers. */
#define CP_REG_AA32_64BIT_SHIFT 15
#define CP_REG_AA32_64BIT_MASK (1 << CP_REG_AA32_64BIT_SHIFT)
@@ -849,6 +855,9 @@ typedef struct ARMCPRegInfo ARMCPRegInfo;
typedef uint64_t CPReadFn(CPUARMState *env, const ARMCPRegInfo *ri);
typedef void CPWriteFn(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value);
+typedef Int128 CPRead128Fn(CPUARMState *env, const ARMCPRegInfo *opaque);
+typedef void CPWrite128Fn(CPUARMState *env, const ARMCPRegInfo *opaque,
+ Int128 value);
/* Access permission check functions for coprocessor registers. */
typedef CPAccessResult CPAccessFn(CPUARMState *env,
const ARMCPRegInfo *ri,
@@ -992,6 +1001,13 @@ struct ARMCPRegInfo {
* fieldoffset is 0 then no reset will be done.
*/
CPResetFn *resetfn;
+
+ /* For ARM_CP_128BIT, when accessed via MRRS/MSRR. */
+ CPAccessFn *access128fn;
+ CPRead128Fn *read128fn;
+ CPWrite128Fn *write128fn;
+ CPRead128Fn *raw_read128fn;
+ CPWrite128Fn *raw_write128fn;
};
void define_one_arm_cp_reg(ARMCPU *cpu, const ARMCPRegInfo *regs);
@@ -1061,6 +1077,9 @@ void arm_cp_reset_ignore(CPUARMState *env, const
ARMCPRegInfo *ri);
*/
static inline MemOp cpreg_field_type(const ARMCPRegInfo *ri)
{
+ if (ri->type & ARM_CP_128BIT) {
+ return MO_128;
+ }
return (ri->state == ARM_CP_STATE_AA64 || (ri->type & ARM_CP_64BIT)
? MO_64 : MO_32);
}
--
2.43.0
