On 8. 8. 25. 18:05, Philippe Mathieu-Daudé wrote: > CAUTION: This email originated from outside of the organization. Do > not click links or open attachments unless you recognize the sender > and know the content is safe. > > > On 17/7/25 11:38, Djordje Todorovic wrote: >> Add RISC-V implementation of the Coherent Manager Global Control >> Register (CMGCR) device. It is based on the existing MIPS CMGCR >> implementation but adapted for RISC-V systems. >> >> The CMGCR device provides global system control for multi-core >> configurations in RISC-V systems. >> >> This is needed for the MIPS BOSTON AIA board. >> >> Signed-off-by: Chao-ying Fu <c...@mips.com> >> Signed-off-by: Djordje Todorovic <djordje.todoro...@htecgroup.com> >> --- >> hw/misc/Kconfig | 10 ++ >> hw/misc/meson.build | 2 + >> hw/misc/riscv_cmgcr.c | 234 ++++++++++++++++++++++++++++++++++ >> include/hw/misc/riscv_cmgcr.h | 49 +++++++ >> 4 files changed, 295 insertions(+) >> create mode 100644 hw/misc/riscv_cmgcr.c >> create mode 100644 include/hw/misc/riscv_cmgcr.h >> >> diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig >> index ec0fa5aa9f..e3fce37c01 100644 >> --- a/hw/misc/Kconfig >> +++ b/hw/misc/Kconfig >> @@ -108,6 +108,16 @@ config STM32L4X5_RCC >> config MIPS_ITU >> bool >> >> +config RISCV_CMGCR >> + bool >> + default n > > $ git grep 'default n' $(git ls-files|fgrep Kconfig) | wc -l > 0 > > I remember asking that already but maybe it was a different > series... Why don't you want this automatically selected by > default? All our codebase does it, why change suddenly?
I agree, will apply this in v7 as well. Thanks!
