On 2025/9/4 下午8:18, Song Gao wrote:
Add feature register and misc register for avecintc feature checking and
setting

Signed-off-by: Song Gao <gaos...@loongson.cn>
---
  hw/loongarch/virt.c | 11 +++++++++++
  1 file changed, 11 insertions(+)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 1a2aa92c25..124f96af03 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -560,6 +560,10 @@ static MemTxResult virt_iocsr_misc_write(void *opaque, 
hwaddr addr,
              return MEMTX_OK;
          }
+ if (val & BIT(IOCSRM_AVEC_EN)) {
+            lvms->misc_status |= BIT(IOCSRM_AVEC_EN);
+        }
+
how about adding virt_has_avecintc(lvms) here, such as
           if (virt_has_avecintc(lvms) && val & BIT(IOCSRM_AVEC_EN)) {
               lvms->misc_status |= BIT(IOCSRM_AVEC_EN);
           }

Otherwise looks good to me.
Reviewed-by: Bibo Mao <maob...@loongson.cn>


Regards
Bibo Mao

          features = address_space_ldl(&lvms->as_iocsr,
                                       EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG,
                                       attrs, NULL);
@@ -595,6 +599,9 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, 
hwaddr addr,
          break;
      case FEATURE_REG:
          ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI);
+        if (virt_has_avecintc(lvms)) {
+            ret |= BIT(IOCSRF_AVEC);
+        }
          if (kvm_enabled()) {
              ret |= BIT(IOCSRF_VM);
          }
@@ -624,6 +631,10 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, 
hwaddr addr,
          if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) {
              ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE);
          }
+        if (virt_has_avecintc(lvms) &&
+            (lvms->misc_status & BIT(IOCSRM_AVEC_EN))) {
+            ret |= BIT_ULL(IOCSRM_AVEC_EN);
+        }
          break;
      default:
          g_assert_not_reached();



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