On 10/14/25 1:34 PM, Anton Johansson wrote:
gprh is only needed for TARGET_RISCV64 when modeling 128-bit registers,
fixing their size to 64 bits makes sense.
gpr is also fixed to 64 bits since all direct uses of env->gpr
correctly zero extend/truncate to/from target_ulong, meaning
!TARGET_RISCV64 will behave as expected.
We do however need to be a bit careful when mapping 64-bit fields to
32-bit TCGv globals on big endian hosts.
Note, the cpu/rv128 VMSTATE version is bumped, breaking migration from
older versions.
Signed-off-by: Anton Johansson <[email protected]>
---
target/riscv/cpu.h | 4 ++--
target/riscv/cpu.c | 2 +-
target/riscv/machine.c | 8 ++++----
target/riscv/riscv-qmp-cmds.c | 2 +-
target/riscv/translate.c | 17 +++++++++++++++--
5 files changed, 23 insertions(+), 10 deletions(-)
Reviewed-by: Pierrick Bouvier <[email protected]>
