On 9/10/25 19:04, Richard Henderson wrote:
On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
We only build the PA-RISC targets using big endianness order:
$ git grep TARGET_BIG_ENDIAN configs/targets/hppa-*
configs/targets/hppa-linux-user.mak:5:TARGET_BIG_ENDIAN=y
configs/targets/hppa-softmmu.mak:2:TARGET_BIG_ENDIAN=y
Therefore the MO_TE definition always expands to MO_BE. Use the
latter to simplify.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
target/hppa/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 6fec63cb433..c9009441ad0 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -106,7 +106,7 @@ typedef struct DisasContext {
static inline MemOp mo_endian(DisasContext *ctx)
{
- return MO_TE;
+ return MO_BE;
}
/* Note that ssm/rsm instructions number PSW_W and PSW_E
differently. */
Reviewed-by: Richard Henderson <[email protected]>
Indeed. Like ppc64, hppa always defaults to big-endian and has a PSW
bit to enable little-endian. (Which we don't implement, and quite
possibly was never implemented in any hardware.)
Indeed, per parisc2.0.pdf:
PSW_E
Little endian memory access enable. When 0, all memory references
are big endian. When 1, all memory references are little endian.
Implementation of this bit is optional. If it is not implemented,
all memory references are big endian and this bit is a reserved bit.
I'll squash:
/* The PSW_E bit sets the (little) endianness, but we don't
implement it. */
Thanks,
Phil.
