On 26/9/25 09:07, Luc Michel wrote:

Francisco Iglesias (1):
   hw/intc/arm_gicv3: Introduce a 'first-cpu-index' property

Luc Michel (46):
   hw/arm/xlnx-versal: split the xlnx-versal type
   hw/arm/xlnx-versal: prepare for FDT creation
   hw/arm/xlnx-versal: uart: refactor creation
   hw/arm/xlnx-versal: canfd: refactor creation
   hw/arm/xlnx-versal: sdhci: refactor creation
   hw/arm/xlnx-versal: gem: refactor creation
   hw/arm/xlnx-versal: adma: refactor creation
   hw/arm/xlnx-versal: xram: refactor creation
   hw/arm/xlnx-versal: usb: refactor creation
   hw/arm/xlnx-versal: efuse: refactor creation
   hw/arm/xlnx-versal: ospi: refactor creation
   hw/arm/xlnx-versal: VersalMap: add support for OR'ed IRQs
   hw/arm/xlnx-versal: PMC IOU SCLR: refactor creation
   hw/arm/xlnx-versal: bbram: refactor creation
   hw/arm/xlnx-versal: trng: refactor creation
   hw/arm/xlnx-versal: rtc: refactor creation
   hw/arm/xlnx-versal: cfu: refactor creation
   hw/arm/xlnx-versal: crl: refactor creation
   hw/arm/xlnx-versal-virt: virtio: refactor creation
   hw/arm/xlnx-versal: refactor CPU cluster creation
   hw/arm/xlnx-versal: add the mp_affinity property to the CPU mapping
   hw/arm/xlnx-versal: instantiate the GIC ITS in the APU
   hw/arm/xlnx-versal: add support for multiple GICs
   hw/arm/xlnx-versal: add support for GICv2
   hw/arm/xlnx-versal: rpu: refactor creation
   hw/arm/xlnx-versal: ocm: refactor creation
   hw/arm/xlnx-versal: ddr: refactor creation
   hw/arm/xlnx-versal: add the versal_get_num_cpu accessor
   hw/misc/xlnx-versal-crl: remove unnecessary include directives
   hw/misc/xlnx-versal-crl: split into base/concrete classes
   hw/misc/xlnx-versal-crl: refactor device reset logic
   hw/arm/xlnx-versal: reconnect the CRL to the other devices
   hw/arm/xlnx-versal: use hw/arm/bsa.h for timer IRQ indices
   hw/arm/xlnx-versal: tidy up
   hw/misc/xlnx-versal-crl: add the versal2 version
   hw/arm/xlnx-versal: add a per_cluster_gic switch to
     VersalCpuClusterMap
   hw/arm/xlnx-versal: add the target field in IRQ descriptor
   target/arm/tcg/cpu64: add the cortex-a78ae CPU
   hw/arm/xlnx-versal: add versal2 SoC
   hw/arm/xlnx-versal-virt: rename the machine to amd-versal-virt
   hw/arm/xlnx-versal-virt: split into base/concrete classes
   hw/arm/xlnx-versal-virt: tidy up
   docs/system/arm/xlnx-versal-virt: update supported devices
   docs/system/arm/xlnx-versal-virt: add a note about dumpdtb
   hw/arm/xlnx-versal-virt: add the xlnx-versal2-virt machine
   tests/functional/test_aarch64_xlnx_versal: test the versal2 machine

Series:
Tested-by: Philippe Mathieu-Daudé <[email protected]>


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