On Mon, 29 Sep 2025 14:36:32 +0100 Shameer Kolothum <[email protected]> wrote:
> From: Eric Auger <[email protected]> > > Add a 'preserve_config' field in struct GPEXConfig and if set, generate the > DSM #5 for preserving PCI boot configurations. For SMMUV3 accel=on support, > we are making use of IORT RMRs in a subsequent patch and that requires the > DSM #5. > > At the moment the DSM generation is not yet enabled. > > Signed-off-by: Eric Auger <[email protected]> > [Shameer: Removed possible duplicate _DSM creations] > Signed-off-by: Shameer Kolothum <[email protected]> > Signed-off-by: Shameer Kolothum <[email protected]> Throw an AML blob in the patch description as easier to check that against the spec. Add a specific spec reference as well. > --- > Previously, QEMU reverted an attempt to enable DSM #5 because it caused a > regression, > https://lore.kernel.org/all/[email protected]/. > > However, in this series, we enable it selectively, only when SMMUv3 is in > accelerator mode. The devices involved in the earlier regression are not > expected in accelerated SMMUv3 use cases. > --- > hw/pci-host/gpex-acpi.c | 29 +++++++++++++++++++++++------ > include/hw/pci-host/gpex.h | 1 + > 2 files changed, 24 insertions(+), 6 deletions(-) > > diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c > index 4587baeb78..e3825ed0b1 100644 > --- a/hw/pci-host/gpex-acpi.c > +++ b/hw/pci-host/gpex-acpi.c > @@ -51,10 +51,11 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, > uint32_t irq, > } > } > > -static Aml *build_pci_host_bridge_dsm_method(void) > +static Aml *build_pci_host_bridge_dsm_method(bool preserve_config) > { > Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED); > Aml *UUID, *ifctx, *ifctx1, *buf; > + uint8_t byte_list[1] = {0}; The inline declaration is a bit odd, but I'm not seeing a specific reason to change that here. Perhaps call out the change as some 'other cleanup' in the patch description if you want to make it anyway. > > /* PCI Firmware Specification 3.0 > * 4.6.1. _DSM for PCI Express Slot Information > @@ -64,10 +65,23 @@ static Aml *build_pci_host_bridge_dsm_method(void) > UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); > ifctx = aml_if(aml_equal(aml_arg(0), UUID)); > ifctx1 = aml_if(aml_equal(aml_arg(2), aml_int(0))); > - uint8_t byte_list[1] = {0}; > + if (preserve_config) { > + /* support for function 0 and function 5 */ > + byte_list[0] = 0x21; Change the comment to reflect the fix in previous patch as otherwise it sounds like bit(0) means function 0 is supported. /* support functions other than 0, specifically function 5 */ > + } > buf = aml_buffer(1, byte_list); > aml_append(ifctx1, aml_return(buf)); > aml_append(ifctx, ifctx1); > + if (preserve_config) { > + Aml *ifctx2 = aml_if(aml_equal(aml_arg(2), aml_int(5))); > + /* > + * 0 - The operating system must not ignore the PCI configuration > that > + * firmware has done at boot time. > + */ > + aml_append(ifctx2, aml_return(aml_int(0))); > + aml_append(ifctx, ifctx2); > + } > + > aml_append(method, ifctx); > > byte_list[0] = 0; > @@ -77,12 +91,13 @@ static Aml *build_pci_host_bridge_dsm_method(void) > }
