On 10/7/25 07:10, Peter Maydell wrote:
Hi; here's the target-arm queue. This is a little bigger than
I prefer, but the bulk of it is Luc's versal2 series.
thanks
-- PMM
The following changes since commit eb7abb4a719f93ddd56571bf91681044b4159399:
hw/intc/loongarch_dintc: Set class_size for LoongArchDINTCClass (2025-10-06
13:54:50 -0700)
are available in the Git repository at:
https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20251007
for you to fetch changes up to 932cac41ca633f24f192a69770bf91b55c4d27bb:
target/arm: Enable FEAT_RME_GPC2 for -cpu max with x-rme (2025-10-07
11:26:10 +0100)
----------------------------------------------------------------
target-arm queue:
* target/arm: Don't set HCR.RW for AArch32 only CPUs
* new board model: amd-versal2-virt
* xlnx-zynqmp: model the GIC for the Cortex-R5 RPU cluster
* hw/arm: Remove sl_bootparam_write() and 'hw/arm/sharpsl.h' header
* Emulate FEAT_RME_GPC2
Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/10.2 as
appropriate.
r~
