On Thu, Aug 28, 2025 at 6:37 AM stove <[email protected]> wrote:
>
> Commit 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC
> writes a read-only CSR") changed the behavior of riscv_csrrw, which
> would formerly be treated as read-only if the write mask were set to 0.
>
> Fixes an exception being raised when accessing read-only vector CSRs
> like vtype.
>
> Fixes: 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC
> writes a read-only CSR")
>
> Signed-off-by: stove <[email protected]>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/cpu.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 4a862da615..dca8edff6d 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -873,7 +873,7 @@ static inline void riscv_csr_write(CPURISCVState *env,
> int csrno,
> static inline target_ulong riscv_csr_read(CPURISCVState *env, int csrno)
> {
> target_ulong val = 0;
> - riscv_csrrw(env, csrno, &val, 0, 0, 0);
> + riscv_csrr(env, csrno, &val);
> return val;
> }
>
> --
> 2.50.1
>
>
