On Sat, Oct 11, 2025 at 1:53 AM Philippe Mathieu-Daudé <[email protected]> wrote: > > All callers of gen_load_idx() / gen_store_idx() set the MO_TE flag. > Set it once in the callees. > > Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Alistair Francis <[email protected]> Alistair > --- > target/riscv/insn_trans/trans_xthead.c.inc | 34 ++++++++++++---------- > 1 file changed, 18 insertions(+), 16 deletions(-) > > diff --git a/target/riscv/insn_trans/trans_xthead.c.inc > b/target/riscv/insn_trans/trans_xthead.c.inc > index 7e69906e5bf..70c563664ab 100644 > --- a/target/riscv/insn_trans/trans_xthead.c.inc > +++ b/target/riscv/insn_trans/trans_xthead.c.inc > @@ -745,6 +745,7 @@ static bool gen_load_idx(DisasContext *ctx, arg_th_memidx > *a, MemOp memop, > TCGv rd = dest_gpr(ctx, a->rd); > TCGv addr = get_th_address_indexed(ctx, a->rs1, a->rs2, a->imm2, > zext_offs); > > + memop |= MO_TE; > tcg_gen_qemu_ld_tl(rd, addr, ctx->mem_idx, memop); > gen_set_gpr(ctx, a->rd, rd); > > @@ -762,6 +763,7 @@ static bool gen_store_idx(DisasContext *ctx, > arg_th_memidx *a, MemOp memop, > TCGv data = get_gpr(ctx, a->rd, EXT_NONE); > TCGv addr = get_th_address_indexed(ctx, a->rs1, a->rs2, a->imm2, > zext_offs); > > + memop |= MO_TE; > tcg_gen_qemu_st_tl(data, addr, ctx->mem_idx, memop); > > return true; > @@ -771,32 +773,32 @@ static bool trans_th_lrd(DisasContext *ctx, > arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > REQUIRE_64BIT(ctx); > - return gen_load_idx(ctx, a, MO_TE | MO_SQ, false); > + return gen_load_idx(ctx, a, MO_SQ, false); > } > > static bool trans_th_lrw(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > - return gen_load_idx(ctx, a, MO_TE | MO_SL, false); > + return gen_load_idx(ctx, a, MO_SL, false); > } > > static bool trans_th_lrwu(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > REQUIRE_64BIT(ctx); > - return gen_load_idx(ctx, a, MO_TE | MO_UL, false); > + return gen_load_idx(ctx, a, MO_UL, false); > } > > static bool trans_th_lrh(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > - return gen_load_idx(ctx, a, MO_TE | MO_SW, false); > + return gen_load_idx(ctx, a, MO_SW, false); > } > > static bool trans_th_lrhu(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > - return gen_load_idx(ctx, a, MO_TE | MO_UW, false); > + return gen_load_idx(ctx, a, MO_UW, false); > } > > static bool trans_th_lrb(DisasContext *ctx, arg_th_memidx *a) > @@ -815,19 +817,19 @@ static bool trans_th_srd(DisasContext *ctx, > arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > REQUIRE_64BIT(ctx); > - return gen_store_idx(ctx, a, MO_TE | MO_SQ, false); > + return gen_store_idx(ctx, a, MO_SQ, false); > } > > static bool trans_th_srw(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > - return gen_store_idx(ctx, a, MO_TE | MO_SL, false); > + return gen_store_idx(ctx, a, MO_SL, false); > } > > static bool trans_th_srh(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > - return gen_store_idx(ctx, a, MO_TE | MO_SW, false); > + return gen_store_idx(ctx, a, MO_SW, false); > } > > static bool trans_th_srb(DisasContext *ctx, arg_th_memidx *a) > @@ -839,32 +841,32 @@ static bool trans_th_lurd(DisasContext *ctx, > arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > REQUIRE_64BIT(ctx); > - return gen_load_idx(ctx, a, MO_TE | MO_SQ, true); > + return gen_load_idx(ctx, a, MO_SQ, true); > } > > static bool trans_th_lurw(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > - return gen_load_idx(ctx, a, MO_TE | MO_SL, true); > + return gen_load_idx(ctx, a, MO_SL, true); > } > > static bool trans_th_lurwu(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > REQUIRE_64BIT(ctx); > - return gen_load_idx(ctx, a, MO_TE | MO_UL, true); > + return gen_load_idx(ctx, a, MO_UL, true); > } > > static bool trans_th_lurh(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > - return gen_load_idx(ctx, a, MO_TE | MO_SW, true); > + return gen_load_idx(ctx, a, MO_SW, true); > } > > static bool trans_th_lurhu(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > - return gen_load_idx(ctx, a, MO_TE | MO_UW, true); > + return gen_load_idx(ctx, a, MO_UW, true); > } > > static bool trans_th_lurb(DisasContext *ctx, arg_th_memidx *a) > @@ -883,19 +885,19 @@ static bool trans_th_surd(DisasContext *ctx, > arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > REQUIRE_64BIT(ctx); > - return gen_store_idx(ctx, a, MO_TE | MO_SQ, true); > + return gen_store_idx(ctx, a, MO_SQ, true); > } > > static bool trans_th_surw(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > - return gen_store_idx(ctx, a, MO_TE | MO_SL, true); > + return gen_store_idx(ctx, a, MO_SL, true); > } > > static bool trans_th_surh(DisasContext *ctx, arg_th_memidx *a) > { > REQUIRE_XTHEADMEMIDX(ctx); > - return gen_store_idx(ctx, a, MO_TE | MO_SW, true); > + return gen_store_idx(ctx, a, MO_SW, true); > } > > static bool trans_th_surb(DisasContext *ctx, arg_th_memidx *a) > -- > 2.51.0 > >
