Loop in more Nuvoton folks. -----Original Message----- From: Yubin Zou <[email protected]> Sent: Wednesday, September 10, 2025 6:11 AM To: [email protected] Cc: Paolo Bonzini <[email protected]>; CS20 KFTing <[email protected]>; Hao Wu <[email protected]>; [email protected]; Peter Maydell <[email protected]>; Yubin Zou <[email protected]> Subject: [PATCH 7/7] hw/arm: Add PCIERC to NPCM7xx SoC
CAUTION - External Email: Do not click links or open attachments unless you acknowledge the sender and content. From: Hao Wu <[email protected]> GitWatcher: ignore Google-Bug-Id: 262946103 Google-Bug-Id: 240169286 Signed-off-by: Hao Wu <[email protected]> Change-Id: I77ce849af30e999ec26aeab62b7db437db28c012 --- hw/arm/Kconfig | 1 + hw/arm/npcm7xx.c | 10 ++++++++++ include/hw/arm/npcm7xx.h | 4 +++- 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 6ac38d083e4a01e09fc00e63df66046c7c17b356..a3f2041db7920c134a2d9d79ed4836bd35507d7b 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -487,6 +487,7 @@ config NPCM7XX select UNIMP select PCA954X select USB_OHCI_SYSBUS + select NPCM_PCIERC config NPCM8XX bool diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index ecfae328a96a49c82beaa53a5d803469c8f02d91..118470af0694718520b7c3828d3a09ecfafb31ec 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -47,6 +47,8 @@ #define NPCM7XX_CLK_BA (0xf0801000) #define NPCM7XX_MC_BA (0xf0824000) #define NPCM7XX_RNG_BA (0xf000b000) +#define NPCM7XX_PCIERC_BA (0xe1000000) +#define NPCM7XX_PCIE_ROOT_BA (0xe8000000) /* USB Host modules */ #define NPCM7XX_EHCI_BA (0xf0806000) @@ -148,6 +150,7 @@ enum NPCM7xxInterrupt { NPCM7XX_GPIO5_IRQ, NPCM7XX_GPIO6_IRQ, NPCM7XX_GPIO7_IRQ, + NPCM7XX_PCIE_RC_IRQ = 127, }; /* Total number of GIC interrupts, including internal Cortex-A9 interrupts. */ @@ -475,6 +478,7 @@ static void npcm7xx_init(Object *obj) } object_initialize_child(obj, "mmc", &s->mmc, TYPE_NPCM7XX_SDHCI); + object_initialize_child(obj, "pcierc", &s->pcierc, + TYPE_NPCM_PCIERC); } static void npcm7xx_realize(DeviceState *dev, Error **errp) @@ -781,6 +785,12 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(sbd, 0, npcm7xx_irq(s, irq)); } + /* PCIe RC */ + sysbus_realize(SYS_BUS_DEVICE(&s->pcierc), &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcierc), 0, NPCM7XX_PCIERC_BA); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcierc), 0, + npcm7xx_irq(s, NPCM7XX_PCIE_RC_IRQ)); + create_unimplemented_device("npcm7xx.shm", 0xc0001000, 4 * KiB); create_unimplemented_device("npcm7xx.vdmx", 0xe0800000, 4 * KiB); create_unimplemented_device("npcm7xx.pcierc", 0xe1000000, 64 * KiB); diff --git a/include/hw/arm/npcm7xx.h b/include/hw/arm/npcm7xx.h index 56536565b748c5fb2f415d85df36bc01cb64dc54..661d4050154a36dc2b90e96915ae59971a8c4a7a 100644 --- a/include/hw/arm/npcm7xx.h +++ b/include/hw/arm/npcm7xx.h @@ -31,6 +31,7 @@ #include "hw/net/npcm7xx_emc.h" #include "hw/net/npcm_gmac.h" #include "hw/nvram/npcm7xx_otp.h" +#include "hw/pci-host/npcm_pcierc.h" #include "hw/timer/npcm7xx_timer.h" #include "hw/ssi/npcm7xx_fiu.h" #include "hw/ssi/npcm_pspi.h" @@ -108,7 +109,8 @@ struct NPCM7xxState { NPCMGMACState gmac[2]; NPCM7xxSDHCIState mmc; NPCMPSPIState pspi[2]; -}; + NPCMPCIERCState pcierc; +} NPCM7xxState; #define TYPE_NPCM7XX "npcm7xx" OBJECT_DECLARE_TYPE(NPCM7xxState, NPCM7xxClass, NPCM7XX) -- 2.51.0.384.g4c02a37b29-goog ________________________________ ________________________________ The privileged confidential information contained in this email is intended for use only by the addressees as indicated by the original sender of this email. If you are not the addressee indicated in this email or are not responsible for delivery of the email to such a person, please kindly reply to the sender indicating this fact and delete all copies of it from your computer and network server immediately. Your cooperation is highly appreciated. It is advised that any unauthorized use of confidential information of Nuvoton is strictly prohibited; and any information in this email irrelevant to the official business of Nuvoton shall be deemed as neither given nor endorsed by Nuvoton.
