> Patch 1 Enhances SSI bus support to properly support multiple attached > devices. An api is provided for SSI/SPI masters to select a particular > device attached to the bus. > > Patch 2 is a device model for the m25p80 style SPI flash chip. > > Patch 3 is the Xilinx XPS SPI contoller. Its a sysbus device that > instantiates a ssi bus, and interfaces the two (as per the controllers > functionality) > > Patch 4 instantiates the XPS SPI controller in the petalogix ML605 > reference platform and connects two m25p80s to it. > > Patch 5 updates the stellaris machine model to use the multi slave SSI > support
I'm still not convinced modelling this as a multipoint bus is a good idea. If nothing else you've failed to model the case where multiple slaves are selected simultanously. Given the chip selects are actual wires, not part of the bus itself, I think multiple point-point busses are a better fit. For the stellaris device we still have the synthetic mux device and intermediate bus. Paul
