On 15/9/25 14:46, Danila Zhebryakov wrote:
Changed most of the PPC MMU helpers to take CPUTLBEntryFull* instead of
pointers to real address, prot and size.
This is needed at least for booke206 MMU to support LE bits (which need to set
TLB_BSWAP in tlb_fill_flags), but also seems reasonable to do to other MMUs for
consistency.
This should not change any behavior at all.
Signed-off-by: Danila Zhebryakov <[email protected]>
---
target/ppc/internal.h | 3 +-
target/ppc/mmu-booke.c | 63 +++++++++++++++++----------------
target/ppc/mmu-booke.h | 2 +-
target/ppc/mmu-hash32.c | 30 +++++++++-------
target/ppc/mmu-hash32.h | 3 +-
target/ppc/mmu-hash64.c | 14 ++++----
target/ppc/mmu-hash64.h | 2 +-
target/ppc/mmu-radix64.c | 20 +++++++----
target/ppc/mmu-radix64.h | 2 +-
target/ppc/mmu_common.c | 75 ++++++++++++++++++++--------------------
target/ppc/mmu_helper.c | 15 ++++----
11 files changed, 121 insertions(+), 108 deletions(-)
@@ -851,19 +851,18 @@ bool ppc_xlate(PowerPCCPU *cpu, vaddr eaddr,
MMUAccessType access_type,
hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
- hwaddr raddr;
- int s, p;
+ CPUTLBEntryFull full;
I'm not convinced "full" is a good variable name (apply to
all changes).
Please zero-initialize with { }, otherwise:
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
/*
* Some MMUs have separate TLBs for code and data. If we only
* try an MMU_DATA_LOAD, we may not be able to read instructions
* mapped by code TLBs, so we also try a MMU_INST_FETCH.
*/
- if (ppc_xlate(cpu, addr, MMU_DATA_LOAD, &raddr, &s, &p,
+ if (ppc_xlate(cpu, addr, MMU_DATA_LOAD, &full,
ppc_env_mmu_index(&cpu->env, false), false) ||
- ppc_xlate(cpu, addr, MMU_INST_FETCH, &raddr, &s, &p,
+ ppc_xlate(cpu, addr, MMU_INST_FETCH, &full,
ppc_env_mmu_index(&cpu->env, true), false)) {
- return raddr & TARGET_PAGE_MASK;
+ return full.phys_addr & TARGET_PAGE_MASK;
}
return -1;
}
