On 23/10/25, Philippe Mathieu-Daudé wrote:
> On 23/10/25 19:14, Anton Johansson wrote:
> > On 15/10/25, Philippe Mathieu-Daudé wrote:
> > > On 15/10/25 15:27, Anton Johansson wrote:
> > > > Signed-off-by: Anton Johansson <[email protected]>
> > > > ---
> > > >    include/hw/riscv/boot.h    | 20 ++++++++++----------
> > > >    hw/riscv/boot.c            | 22 +++++++++++-----------
> > > >    hw/riscv/microchip_pfsoc.c |  2 +-
> > > >    hw/riscv/sifive_u.c        |  2 +-
> > > >    hw/riscv/spike.c           |  4 ++--
> > > >    hw/riscv/virt.c            |  2 +-
> > > >    6 files changed, 26 insertions(+), 26 deletions(-)
> > > > 
> > > > diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
> > > > index 7d59b2e6c6..d835594baa 100644
> > > > --- a/include/hw/riscv/boot.h
> > > > +++ b/include/hw/riscv/boot.h
> > > > @@ -43,21 +43,21 @@ bool riscv_is_32bit(RISCVHartArrayState *harts);
> > > >    char *riscv_plic_hart_config_string(int hart_count);
> > > >    void riscv_boot_info_init(RISCVBootInfo *info, RISCVHartArrayState 
> > > > *harts);
> > > > -target_ulong riscv_calc_kernel_start_addr(RISCVBootInfo *info,
> > > > -                                          target_ulong 
> > > > firmware_end_addr);
> > > > -target_ulong riscv_find_and_load_firmware(MachineState *machine,
> > > > -                                          const char 
> > > > *default_machine_firmware,
> > > > -                                          hwaddr *firmware_load_addr,
> > > > -                                          symbol_fn_t sym_cb);
> > > > +hwaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info,
> > > > +                                    hwaddr firmware_end_addr);
> > > > +hwaddr riscv_find_and_load_firmware(MachineState *machine,
> > > > +                                    const char 
> > > > *default_machine_firmware,
> > > > +                                    hwaddr *firmware_load_addr,
> > > > +                                    symbol_fn_t sym_cb);
> > > >    const char *riscv_default_firmware_name(RISCVHartArrayState *harts);
> > > >    char *riscv_find_firmware(const char *firmware_filename,
> > > >                              const char *default_machine_firmware);
> > > > -target_ulong riscv_load_firmware(const char *firmware_filename,
> > > > -                                 hwaddr *firmware_load_addr,
> > > > -                                 symbol_fn_t sym_cb);
> > > > +hwaddr riscv_load_firmware(const char *firmware_filename,
> > > > +                           hwaddr *firmware_load_addr,
> > > > +                           symbol_fn_t sym_cb);
> > > >    void riscv_load_kernel(MachineState *machine,
> > > >                           RISCVBootInfo *info,
> > > > -                       target_ulong kernel_start_addr,
> > > > +                       hwaddr kernel_start_addr,
> > > 
> > > vaddr?
> > 
> > Maybe vaddr would be more suitable, I went with hwaddr as
> > kernel_start_addr is fed into load_image_targphys_as()
> > which expects hwaddr, and hw/arm does the same.
> 
> load_kernel() tries to load a file at a vaddr; when it fails
> (because can not be parsed, i.e. ELF) the fallback is to try
> to load as firmware at a hwaddr. My understanding anyway...

For riscv_load_kernel() the kernel_start_addr argument is the fallback
address to load at in case uboot/elf loading fails IIUC.  Also the
RISCVBootInfo struct which is populated holds hwaddr.  I'll submit v2 of
this patch as is, at least it will be more consistent.

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