On Sun, 2 Nov 2025, Chad Jablonski wrote:
Writing to any of the HOST_DATA0-7 registers pushes the written data
into a buffer. A final write to HOST_DATA_LAST writes data to the
buffer and triggers the pending blit operation.
The buffer for now is a static 4MiB and overflows are checked. This
seems like a large enough value given what I've seen in testing. Future
work could dynamically size the buffer based on the destination dimensions if
needed.
I wonder where the real chip stores this information?
Regards,
BALATON Zoltan
