On Tue, Nov 04, 2025 at 11:43:07AM -0800, Nicolin Chen wrote: > > Right, but qemu has no way to duplicate that behavior unless it walks > > the full s1 and s2 page tables, which we have said it isn't going to > > do. > > I think it could. > > The stage-1 page table is in the guest RAM. And vSMMU has already > implemented the logic to walk through a guest page table. What KVM > has already been doing today is to ask vSMMU to translate that.
No, we can't. The existing vsmmu code could do it because it mediated the invalidation path. As soon as you have something like vcmdq the hypervisor cannot walk the page tables. > > So it should probably just ignore this check and assume the IOVA is > > set properly, exactly the same as if it was HW injected using the RMR. > > Hmm, I am not sure about that, especially considering our plan to > support the true 2-stage mapping: gIOVA->vITS->pITS :-/ In true mode the HW path will work perfectly and the SW path will remain deficient in not checking for invalid configuration I don't see another sensible choice. Jason
