On LoongArch system, CPU model name comes from IOCSR register LOONGARCH_IOCSR_VENDOR and LOONGARCH_IOCSR_CPUNAME. Its value can be initialized when CPU is created.
Signed-off-by: Bibo Mao <[email protected]> --- hw/loongarch/virt.c | 6 ++++-- target/loongarch/cpu.c | 4 ++++ target/loongarch/cpu.h | 6 ++++++ 3 files changed, 14 insertions(+), 2 deletions(-) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 49434ad182..3ae723239f 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -635,7 +635,9 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); uint64_t ret = 0; int features; + CPULoongArchState *env; + env = &LOONGARCH_CPU(first_cpu)->env; switch (addr) { case VERSION_REG: ret = 0x11ULL; @@ -650,10 +652,10 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, } break; case VENDOR_REG: - ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */ + ret = env->vendor_id; break; case CPUNAME_REG: - ret = 0x303030354133ULL; /* "3A5000" */ + ret = env->cpu_id; break; case MISC_FUNC_REG: if (kvm_irqchip_in_kernel()) { diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 68ae3aff97..8b8723a343 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -282,6 +282,8 @@ static void loongarch_la464_initfn(Object *obj) data = FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA464); data = FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON); env->cpucfg[0] = data; + memccpy((void *)&env->vendor_id, CPU_VENDOR_LOONGSON, 0, 8); + memccpy((void *)&env->cpu_id, CPU_MODEL_3A5000, 0, 8); data = 0; data = FIELD_DP32(data, CPUCFG1, ARCH, 2); @@ -393,6 +395,8 @@ static void loongarch_la132_initfn(Object *obj) data = FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA132); data = FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON); env->cpucfg[0] = data; + memccpy((void *)&env->vendor_id, CPU_VENDOR_LOONGSON, 0, 8); + memccpy((void *)&env->cpu_id, CPU_MODEL_1C101, 0, 8); data = 0; data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */ diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index c00ad67457..6cda47ee96 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -301,6 +301,10 @@ typedef struct LoongArchBT { uint32_t ftop; } lbt_t; +#define CPU_VENDOR_LOONGSON "Loongson" +#define CPU_MODEL_3A5000 "3A5000" +#define CPU_MODEL_1C101 "1C101" + typedef struct CPUArchState { uint64_t gpr[32]; uint64_t pc; @@ -312,6 +316,8 @@ typedef struct CPUArchState { uint32_t cpucfg[21]; uint32_t pv_features; + uint64_t vendor_id; + uint64_t cpu_id; /* LoongArch CSRs */ uint64_t CSR_CRMD; -- 2.39.3
