Hi Cédric, If I use the current I3C model, it causes a kernel crash because the value of ASPEED_I3C_NR_DEVICES is smaller than what AST1700 supports: https://github.com/qemu/qemu/blob/master/include/hw/misc/aspeed_i3c.h#L21
The AST1700 can support up to 16 I3C buses. In the current I3C model (and in Joe's patches), the value of ASPEED_I3C_NR_DEVICES remains 6, so I would encounter the same issue if I used them directly. I plan to either increase the value of ASPEED_I3C_NR_DEVICES or add a configurable method to set the number of I3C buses after Joe's patches are merged. After that, I'll update the AST1700 I3C model to use the new I3C framework. If you have any comments or suggestions, please let me know. Best Regards, Kane > -----Original Message----- > From: Cédric Le Goater <[email protected]> > Sent: Friday, November 7, 2025 4:06 PM > To: Kane Chen <[email protected]>; Peter Maydell > <[email protected]>; Steven Lee <[email protected]>; Troy > Lee <[email protected]>; Jamin Lin <[email protected]>; Andrew > Jeffery <[email protected]>; Joel Stanley <[email protected]>; > open list:ASPEED BMCs <[email protected]>; open list:All patches CC > here <[email protected]>; Joe Komlodi <[email protected]>; > Patrick Leis <[email protected]> > Cc: Troy Lee <[email protected]> > Subject: Re: [PATCH v2 15/17] hw/arm/aspeed: Model AST1700 I3C block as > unimplemented device > > Hello, > > + Joe, Patrick > > On 11/5/25 04:58, Kane Chen wrote: > > From: Kane-Chen-AS <[email protected]> > > > > AST1700 exposes more I3C buses than the current dummy I3C model > > provides. When Linux probes the I3C devices on AST1700 this mismatch > > can trigger a kernel panic. Model the I3C block as an unimplemented > > device to make the missing functionality explicit and avoid unexpected > > side effects. > > > > This wires up the I3C interrupt lines for the IO expanders and adds > > the corresponding device entries for the AST1700 model. > > > > No functional I3C emulation is provided yet; this only prevents > > crashes and documents the missing piece. > > > > Signed-off-by: Kane-Chen-AS <[email protected]> > > --- > > include/hw/arm/aspeed_soc.h | 2 ++ > > include/hw/misc/aspeed_ast1700.h | 2 ++ > > hw/arm/aspeed_ast27x0.c | 19 +++++++++++++++++-- > > hw/misc/aspeed_ast1700.c | 17 +++++++++++++++++ > > 4 files changed, 38 insertions(+), 2 deletions(-) > > Joe sent (twice) changes adding I3C support [1]. > > I’ve been maintaining it in my branch, and from both a code and testing > perspective, it looks solid. I believe it’s ready to be merged. We now just > need > maintainers and reviewers to step in. > > Would it be useful for this model ? If so, that would be an additional reason. > > Thanks, > > C. > > [1] > https://lore.kernel.org/qemu-devel/20250613000411.1516521-1-komlodi@g > oogle.com/
