Since commit b66f73a0 ("hw/sd: Add SDHC support for SD card SPI-mode"),
the CARD_POWER_UP bit in the OCR register has been set after reset.
Therefore, checking this bit against zero in sd_response_r1_make() to
determine the card’s idle state is incorrect in SPI mode. As a result,
QEMU makes the U-Boot mmc-spi driver believe the card never leaves the
reset state.
Fixes: 1585ab9f ("hw/sd/sdcard: Fill SPI response bits in card code")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2945
Reported-by: Tom Rini <[email protected]>
Signed-off-by: Bin Meng <[email protected]>
---
hw/sd/sd.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 9c86c016cc..5aae541363 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -789,8 +789,7 @@ static size_t sd_response_size(SDState *sd, sd_rsp_type_t
rtype)
static void sd_response_r1_make(SDState *sd, uint8_t *response)
{
if (sd_is_spi(sd)) {
- response[0] = sd->state == sd_idle_state
- && !FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP);
+ response[0] = sd->state == sd_idle_state;
response[0] |= FIELD_EX32(sd->card_status, CSR, ERASE_RESET) << 1;
response[0] |= FIELD_EX32(sd->card_status, CSR, ILLEGAL_COMMAND) << 2;
response[0] |= FIELD_EX32(sd->card_status, CSR, COM_CRC_ERROR) << 3;
--
2.34.1
