Hi, Philippe!
On 24/11/2025 05:47, Philippe Mathieu-Daudé wrote:
Before commit 3716d5902d7 ("pci: introduce a bus master container")
device view of the bus address space was correctly sized to the
bus aperture, but then it always used a 64-bit aperture. Restore
the previous behavior, so devices on 32-bit PCI only see 32-bit
address space.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
hw/pci/pci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index b1eba348e06..64f33b9de04 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -1375,7 +1375,8 @@ static PCIDevice *do_pci_register_device(PCIDevice
*pci_dev,
pstrcpy(pci_dev->name, sizeof(pci_dev->name), name);
memory_region_init(&pci_dev->bus_master_container_region, OBJECT(pci_dev),
- "bus master container", UINT64_MAX);
+ "bus master container",
+ memory_region_size(bus->address_space_mem));
address_space_init(&pci_dev->bus_master_as,
&pci_dev->bus_master_container_region, pci_dev->name);
pci_dev->bus_master_as.max_bounce_buffer_size =
Acked-by: Yodel Eldar <[email protected]>
Thanks,
Yodel
