Define SABRELITE_MACHINE manually instead of DEFINE_MACHINE_ARM to allow "canbus*" machine properties to be added later.
Signed-off-by: Matyáš Bobek <[email protected]> --- hw/arm/sabrelite.c | 54 +++++++++++++++++++++++++++++++++++++--------- 1 file changed, 44 insertions(+), 10 deletions(-) diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c index 5b4ab7d77a..29418af190 100644 --- a/hw/arm/sabrelite.c +++ b/hw/arm/sabrelite.c @@ -20,6 +20,16 @@ #include "qemu/error-report.h" #include "system/qtest.h" +typedef struct SabreliteMachineState { + MachineState parent_obj; + FslIMX6State soc; + + struct arm_boot_info binfo; +} Sabrelite; + +#define TYPE_SABRELITE_MACHINE MACHINE_TYPE_NAME("sabrelite") +OBJECT_DECLARE_SIMPLE_TYPE(SabreliteMachineState, SABRELITE_MACHINE) + static struct arm_boot_info sabrelite_binfo = { /* DDR memory start */ .loader_start = FSL_IMX6_MMDC_ADDR, @@ -41,7 +51,7 @@ static void sabrelite_reset_secondary(ARMCPU *cpu, static void sabrelite_init(MachineState *machine) { - FslIMX6State *s; + Sabrelite *s = SABRELITE_MACHINE(machine); /* Check the amount of memory is compatible with the SOC */ if (machine->ram_size > FSL_IMX6_MMDC_SIZE) { @@ -50,13 +60,12 @@ static void sabrelite_init(MachineState *machine) exit(1); } - s = FSL_IMX6(object_new(TYPE_FSL_IMX6)); - object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX6); /* Ethernet PHY address is 6 */ - object_property_set_int(OBJECT(s), "fec-phy-num", 6, &error_fatal); + object_property_set_int(OBJECT(&s->soc), "fec-phy-num", 6, &error_fatal); - qdev_realize(DEVICE(s), NULL, &error_fatal); + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR, machine->ram); @@ -70,7 +79,7 @@ static void sabrelite_init(MachineState *machine) /* Add the sst25vf016b NOR FLASH memory to first SPI */ Object *spi_dev; - spi_dev = object_resolve_path_component(OBJECT(s), "spi1"); + spi_dev = object_resolve_path_component(OBJECT(&s->soc), "spi1"); if (spi_dev) { SSIBus *spi_bus; @@ -89,23 +98,33 @@ static void sabrelite_init(MachineState *machine) qdev_realize_and_unref(flash_dev, BUS(spi_bus), &error_fatal); cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); - qdev_connect_gpio_out(DEVICE(&s->gpio[2]), 19, cs_line); + qdev_connect_gpio_out(DEVICE(&s->soc.gpio[2]), 19, cs_line); } } } + sabrelite_binfo.ram_size = machine->ram_size; sabrelite_binfo.secure_boot = true; sabrelite_binfo.write_secondary_boot = sabrelite_write_secondary; sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary; if (!qtest_enabled()) { - arm_load_kernel(&s->cpu[0], machine, &sabrelite_binfo); + arm_load_kernel(&s->soc.cpu[0], machine, &sabrelite_binfo); } } -static void sabrelite_machine_init(MachineClass *mc) +static void sabrelite_machine_instance_init(Object *obj) { + Sabrelite *s = SABRELITE_MACHINE(obj); + + (void)s; +} + +static void sabrelite_machine_class_init(ObjectClass *oc, const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + mc->desc = "Freescale i.MX6 Quad SABRE Lite Board (Cortex-A9)"; mc->init = sabrelite_init; mc->max_cpus = FSL_IMX6_NUM_CPUS; @@ -114,4 +133,19 @@ static void sabrelite_machine_init(MachineClass *mc) mc->auto_create_sdcard = true; } -DEFINE_MACHINE_ARM("sabrelite", sabrelite_machine_init) +static const TypeInfo sabrelite_machine_init_typeinfo = { + .name = TYPE_SABRELITE_MACHINE, + .parent = TYPE_MACHINE, + .class_init = sabrelite_machine_class_init, + .instance_init = sabrelite_machine_instance_init, + .instance_size = sizeof(Sabrelite), + .abstract = false, + .interfaces = arm_machine_interfaces, +}; + +static void sabrelite_machine_init_register_types(void) +{ + type_register_static(&sabrelite_machine_init_typeinfo); +} + +type_init(sabrelite_machine_init_register_types) -- 2.52.0
