The function depends on target_ulong and is via the pmu.h header exposed to hw/riscv, this function is only used internally in pmu.c and csr.c, so move it to the internal csr.h header.
Signed-off-by: Anton Johansson <[email protected]> --- target/riscv/csr.h | 3 +++ target/riscv/pmu.h | 2 -- target/riscv/pmu.c | 1 + 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/target/riscv/csr.h b/target/riscv/csr.h index 3752a0ef43..e6a6f2e85f 100644 --- a/target/riscv/csr.h +++ b/target/riscv/csr.h @@ -90,4 +90,7 @@ void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index, target_ulong val); target_ulong pmpaddr_csr_read(CPURISCVState *env, uint32_t addr_index); +/* PMU CSRs */ +RISCVException riscv_pmu_read_ctr(CPURISCVState *env, target_ulong *val, + bool upper_half, uint32_t ctr_idx); #endif /* RISCV_CSR_H */ diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h index 3853d0e262..ca40cfeed6 100644 --- a/target/riscv/pmu.h +++ b/target/riscv/pmu.h @@ -36,7 +36,5 @@ int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t value, uint32_t ctr_idx); void riscv_pmu_update_fixed_ctrs(CPURISCVState *env, target_ulong newpriv, bool new_virt); -RISCVException riscv_pmu_read_ctr(CPURISCVState *env, target_ulong *val, - bool upper_half, uint32_t ctr_idx); #endif /* RISCV_PMU_H */ diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c index 708f2ec7aa..9701c8cba6 100644 --- a/target/riscv/pmu.c +++ b/target/riscv/pmu.c @@ -22,6 +22,7 @@ #include "qemu/timer.h" #include "cpu.h" #include "pmu.h" +#include "target/riscv/csr.h" #include "exec/icount.h" #include "system/device_tree.h" -- 2.51.0
