In preparation of removing the cpu_ldl_code wrapper, inline it. Since SPARC instructions are always stored in big-endian order, replace MO_TE -> MO_BE.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]> --- target/sparc/int32_helper.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c index b29f693a6bf..d6bb3fa1e54 100644 --- a/target/sparc/int32_helper.c +++ b/target/sparc/int32_helper.c @@ -149,9 +149,11 @@ void sparc_cpu_do_interrupt(CPUState *cs) * mimic delayed trap delivery as if by the subsequent insn. */ if (!env->fsr_qne) { + MemOpIdx oi = make_memop_idx(MO_BEUL, cpu_mmu_index(cs, true)); + env->fsr_qne = FSR_QNE; env->fq.s.addr = env->pc; - env->fq.s.insn = cpu_ldl_code(env, env->pc); + env->fq.s.insn = cpu_ldl_code_mmu(env, env->pc, oi, 0); } env->pc = env->npc; env->npc = env->npc + 4; -- 2.52.0
