[PATCH 6/8] target/loongarch: Use explicit little-endian LD/ST API

[Philippe Mathieu-Daudé]

The LoongArch architecture uses little endianness. Directly
use the little-endian LD/ST API.

Mechanical change using:

  $ end=le; \
    for acc in uw w l q tul; do \
      sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \
             -e "s/st${acc}_p(/st${acc}_${end}_p(/" \
        $(git grep -wlE '(ld|st)t?u?[wlq]_p' target/loongarch/); \
    done

Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
 target/loongarch/cpu_helper.c       |  8 ++++----
 target/loongarch/tcg/iocsr_helper.c | 24 ++++++++++++------------
 target/loongarch/tcg/tlb_helper.c   |  4 ++--
 3 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/target/loongarch/cpu_helper.c b/target/loongarch/cpu_helper.c
index 2b27274f64e..51ad9ff2b46 100644
--- a/target/loongarch/cpu_helper.c
+++ b/target/loongarch/cpu_helper.c
@@ -172,7 +172,7 @@ TLBRet loongarch_ptw(CPULoongArchState *env, MMUContext 
*context,
         /* get next level page directory */
         index = (address >> dir_base) & ((1 << dir_width) - 1);
         phys = base | index << 3;
-        base = ldq_phys(cs->as, phys);
+        base = ldq_le_phys(cs->as, phys);
         if (level) {
             if (FIELD_EX64(base, TLBENTRY, HUGE)) {
                 /* base is a huge pte */
@@ -204,8 +204,8 @@ restart:
     } else if (cpu_has_ptw(env)) {
         index &= 1;
         context->pte_buddy[index] = base;
-        context->pte_buddy[1 - index] = ldq_phys(cs->as,
-                                            phys + 8 * (1 - 2 * index));
+        context->pte_buddy[1 - index] = ldq_le_phys(cs->as,
+                                                    phys + 8 * (1 - 2 * 
index));
     }
 
     context->ps = dir_base;
@@ -237,7 +237,7 @@ restart:
         ret1 = loongarch_cmpxchg_phys(cs, phys, pte, base);
         /* PTE updated by other CPU, reload PTE entry */
         if (ret1 == MEMTX_DECODE_ERROR) {
-            base = ldq_phys(cs->as, phys);
+            base = ldq_le_phys(cs->as, phys);
             goto restart;
         }
 
diff --git a/target/loongarch/tcg/iocsr_helper.c 
b/target/loongarch/tcg/iocsr_helper.c
index c155f48564d..b0f171608bc 100644
--- a/target/loongarch/tcg/iocsr_helper.c
+++ b/target/loongarch/tcg/iocsr_helper.c
@@ -22,20 +22,20 @@ uint64_t helper_iocsrrd_b(CPULoongArchState *env, 
target_ulong r_addr)
 
 uint64_t helper_iocsrrd_h(CPULoongArchState *env, target_ulong r_addr)
 {
-    return address_space_lduw(env->address_space_iocsr, r_addr,
-                              GET_MEMTXATTRS(env), NULL);
+    return address_space_lduw_le(env->address_space_iocsr, r_addr,
+                                 GET_MEMTXATTRS(env), NULL);
 }
 
 uint64_t helper_iocsrrd_w(CPULoongArchState *env, target_ulong r_addr)
 {
-    return address_space_ldl(env->address_space_iocsr, r_addr,
-                             GET_MEMTXATTRS(env), NULL);
+    return address_space_ldl_le(env->address_space_iocsr, r_addr,
+                                GET_MEMTXATTRS(env), NULL);
 }
 
 uint64_t helper_iocsrrd_d(CPULoongArchState *env, target_ulong r_addr)
 {
-    return address_space_ldq(env->address_space_iocsr, r_addr,
-                             GET_MEMTXATTRS(env), NULL);
+    return address_space_ldq_le(env->address_space_iocsr, r_addr,
+                                GET_MEMTXATTRS(env), NULL);
 }
 
 void helper_iocsrwr_b(CPULoongArchState *env, target_ulong w_addr,
@@ -48,20 +48,20 @@ void helper_iocsrwr_b(CPULoongArchState *env, target_ulong 
w_addr,
 void helper_iocsrwr_h(CPULoongArchState *env, target_ulong w_addr,
                       target_ulong val)
 {
-    address_space_stw(env->address_space_iocsr, w_addr,
-                      val, GET_MEMTXATTRS(env), NULL);
+    address_space_stw_le(env->address_space_iocsr, w_addr,
+                         val, GET_MEMTXATTRS(env), NULL);
 }
 
 void helper_iocsrwr_w(CPULoongArchState *env, target_ulong w_addr,
                       target_ulong val)
 {
-    address_space_stl(env->address_space_iocsr, w_addr,
-                      val, GET_MEMTXATTRS(env), NULL);
+    address_space_stl_le(env->address_space_iocsr, w_addr,
+                         val, GET_MEMTXATTRS(env), NULL);
 }
 
 void helper_iocsrwr_d(CPULoongArchState *env, target_ulong w_addr,
                       target_ulong val)
 {
-    address_space_stq(env->address_space_iocsr, w_addr,
-                      val, GET_MEMTXATTRS(env), NULL);
+    address_space_stq_le(env->address_space_iocsr, w_addr,
+                         val, GET_MEMTXATTRS(env), NULL);
 }
diff --git a/target/loongarch/tcg/tlb_helper.c 
b/target/loongarch/tcg/tlb_helper.c
index aab89b9be19..b6e9a3a3c7f 100644
--- a/target/loongarch/tcg/tlb_helper.c
+++ b/target/loongarch/tcg/tlb_helper.c
@@ -719,7 +719,7 @@ target_ulong helper_lddir(CPULoongArchState *env, 
target_ulong base,
     get_dir_base_width(env, &dir_base, &dir_width, level);
     index = (badvaddr >> dir_base) & ((1 << dir_width) - 1);
     phys = base | index << 3;
-    return ldq_phys(cs->as, phys) & TARGET_PHYS_MASK;
+    return ldq_le_phys(cs->as, phys) & TARGET_PHYS_MASK;
 }
 
 void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
@@ -781,7 +781,7 @@ void helper_ldpte(CPULoongArchState *env, target_ulong 
base, target_ulong odd,
         ptoffset0 = ptindex << 3;
         ptoffset1 = (ptindex + 1) << 3;
         phys = base | (odd ? ptoffset1 : ptoffset0);
-        tmp0 = ldq_phys(cs->as, phys) & TARGET_PHYS_MASK;
+        tmp0 = ldq_le_phys(cs->as, phys) & TARGET_PHYS_MASK;
         ps = ptbase;
     }
 
-- 
2.52.0