Hi Peter,
Thank you for your reply.
I initially identified this error while reviewing the code and was curious
why it hadn't caused any bugs.
After further testing, it appears the original code behaved correctly by
coincidence.
The ASL code in the ARM ARM for FRSQRTE states:
```
elsif sign == '1' then
result = FPDefaultNaN(fpcr, N);
if fpexc then FPProcessException(FPExc_InvalidOp, fpcr);
```
As it turns out, the sign bit must be zero by the time it reaches the final
deposition code, which explains why the incorrect bit placement did not
surface as a functional bug.
On Mon, Dec 29, 2025 at 1:15 AM Peter Maydell <[email protected]>
wrote:
> On Fri, 26 Dec 2025 at 06:43, Li-Hang Lin <[email protected]> wrote:
> >
> > Fix an error in rsqrte_f64() where the sign bit was being
> > placed incorrectly. Specifically, ensure f64_sign is deposited
> > into bit 63.
> >
> > Additionally, update the comments regarding the exponent (exp) bit
> > width to reflect the correct double-precision specifications.
>
> This seems like it would produce incorrect results -- do you
> have an example of an instruction plus input data values that p
> produces a different output value to the hardware?
>
> thanks
> -- PMM
>
