On 12/28/25 3:53 PM, Mohamed Mediouni wrote:
Link to branch: https://github.com/mediouni-m/qemu whpx (tag for this
submission: whpx-v12)
Missing features:
- VM save-restore: interrupt controller state notably
- SVE register sync: I didn't have the time to test this on pre-release
hardware with SVE2 support yet.
So SVE2 is currently masked for VMs when running this.
Known bugs:
- U-Boot still doesn't work (hangs when trying to parse firmware) but EDK2 does.
Note:
"target/arm/kvm: add constants for new PSCI versions" taken from the mailing
list.
"accel/system: Introduce hwaccel_enabled() helper" taken from the mailing list,
added here
as part of this series to make it compilable as a whole.
"hw/arm: virt: add GICv2m for the case when ITS is not available" present in
both the HVF
vGIC and this series.
"hw: arm: virt-acpi-build: add temporary hack to match existing behavior" is not
proper" is
for ACPI stability but what is the right approach to follow there?
And another note:
Seems that unlike HVF there isn't direct correspondence between WHv registers
and the actual register layout,
so didn't do changes there to a sysreg.inc.
Updates since v11:
- Address review comments
- Rebase up to latest staging
- Switch to assuming Qemu 11.0 as the newest machine model
Updates since v10:
- Bring forward to latest Qemu
- Fix a typo in the GICv3+GICv2m PR
Updates since v9:
- Adding partition reset on the reboot side of things...
Updates since v8:
- v9 and v8 were not submitted properly because of my MTA not behaving, sorry
for that.
- v10 introduces a new argument, -M msi=, to handle MSI-X configuration more
granularly.
- That surfaced what I think is a bug (?), with vms->its=1 on GICv2
configurations... or I did understand everything wrong.
- Oopsie due to email provider ratelimiting.
Updates since v7:
- Oops, fixing bug in "hw/arm: virt: cleanly fail on attempt to use the platform
vGIC together with ITS".
Other commits are unchanged.
Updates since v6:
- Rebasing
- Fixing a bug in the GICv3+GICv2m case for ACPI table generation
- getting rid of the slots infrastructure for memory management
- Place the docs commit right after the "cleanly fail on attempt to run GICv3+GICv2m
on an unsupported config" one
as that's what switches ITS to a tristate.
- Fixing a build issue when getting rid of the arch-specific arm64 hvf-stub.
Updates since v5:
- Rebasing
- Address review comments
- Rework ITS enablement to a tristate
- On x86: move away from deprecated APIs to get/set APIC state
Updates since v4:
- Taking into account review comments
- Add migration blocker in the vGICv3 code due to missing interrupt controller
save/restore
- Debug register sync
Updates since v3:
- Disabling SVE on WHPX
- Taking into account review comments incl:
- fixing x86 support
- reduce the amount of __x86_64__ checks in common code to the minimum
(winhvemulation)
which can be reduced even further down the road.
- generalize get_physical_address_range into something common between hvf and
whpx
Updates since v2:
- Fixed up a rebase screwup for whpx-internal.h
- Fixed ID_AA64ISAR1_EL1 and ID_AA64ISAR2_EL1 feature probe for -cpu host
- Switched to ID_AA64PFR1_EL1/ID_AA64DFR0_EL1 instead of their non-AA64 variant
Updates since v1:
- Shutdowns and reboots
- MPIDR_EL1 register sync
- Fixing GICD_TYPER_LPIS value
- IPA size clamping
- -cpu host now implemented
Mohamed Mediouni (26):
qtest: hw/arm: virt: skip ACPI test for ITS off
hw/arm: virt: add GICv2m for the case when ITS is not available
tests: data: update AArch64 ACPI tables
hw/arm: virt: cleanly fail on attempt to use the platform vGIC
together with ITS
hw: arm: virt: rework MSI-X configuration
hw: arm: virt-acpi-build: add temporary hack to match existing
behavior
docs: arm: update virt machine model description
whpx: Move around files before introducing AArch64 support
whpx: reshuffle common code
whpx: ifdef out winhvemulation on non-x86_64
whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define
hw, target, accel: whpx: change apic_in_platform to kernel_irqchip
whpx: interrupt controller support
whpx: add arm64 support
whpx: change memory management logic
target/arm: cpu: mark WHPX as supporting PSCI 1.3
whpx: arm64: clamp down IPA size
hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX
and HVF
whpx: arm64: implement -cpu host
target/arm: whpx: instantiate GIC early
whpx: arm64: gicv3: add migration blocker
whpx: enable arm64 builds
whpx: apic: use non-deprecated APIs to control interrupt controller
state
whpx: arm64: check for physical address width after WHPX availability
whpx: arm64: add partition-wide reset on the reboot path
MAINTAINERS: update the list of maintained files for WHPX
Philippe Mathieu-Daudé (1):
accel/system: Introduce hwaccel_enabled() helper
Sebastian Ott (1):
target/arm/kvm: add constants for new PSCI versions
MAINTAINERS | 6 +
accel/hvf/hvf-all.c | 7 +-
accel/meson.build | 1 +
accel/stubs/whpx-stub.c | 1 +
accel/whpx/meson.build | 7 +
{target/i386 => accel}/whpx/whpx-accel-ops.c | 6 +-
accel/whpx/whpx-common.c | 540 +++++++++
docs/system/arm/virt.rst | 13 +-
hw/arm/virt-acpi-build.c | 16 +-
hw/arm/virt.c | 140 ++-
hw/i386/x86-cpu.c | 4 +-
hw/intc/arm_gicv3_common.c | 3 +
hw/intc/arm_gicv3_whpx.c | 249 ++++
hw/intc/meson.build | 1 +
include/hw/arm/virt.h | 8 +-
include/hw/core/boards.h | 3 +-
include/hw/intc/arm_gicv3_common.h | 3 +
include/system/hvf_int.h | 5 +
include/system/hw_accel.h | 13 +
.../whpx => include/system}/whpx-accel-ops.h | 4 +-
include/system/whpx-all.h | 20 +
include/system/whpx-common.h | 26 +
.../whpx => include/system}/whpx-internal.h | 25 +-
include/system/whpx.h | 5 +-
meson.build | 20 +-
target/arm/cpu.c | 3 +
target/arm/cpu64.c | 17 +-
target/arm/hvf-stub.c | 20 -
target/arm/hvf/hvf.c | 6 +-
target/arm/hvf_arm.h | 3 -
target/arm/kvm-consts.h | 2 +
target/arm/meson.build | 2 +-
target/arm/whpx/meson.build | 5 +
target/arm/whpx/whpx-all.c | 1020 +++++++++++++++++
target/arm/whpx/whpx-stub.c | 15 +
target/arm/whpx_arm.h | 17 +
target/i386/cpu-apic.c | 2 +-
target/i386/hvf/hvf.c | 11 +
target/i386/whpx/meson.build | 1 -
target/i386/whpx/whpx-all.c | 569 +--------
target/i386/whpx/whpx-apic.c | 48 +-
tests/data/acpi/aarch64/virt/APIC.its_off | Bin 164 -> 188 bytes
42 files changed, 2219 insertions(+), 648 deletions(-)
create mode 100644 accel/whpx/meson.build
rename {target/i386 => accel}/whpx/whpx-accel-ops.c (96%)
create mode 100644 accel/whpx/whpx-common.c
create mode 100644 hw/intc/arm_gicv3_whpx.c
rename {target/i386/whpx => include/system}/whpx-accel-ops.h (92%)
create mode 100644 include/system/whpx-all.h
create mode 100644 include/system/whpx-common.h
rename {target/i386/whpx => include/system}/whpx-internal.h (88%)
delete mode 100644 target/arm/hvf-stub.c
create mode 100644 target/arm/whpx/meson.build
create mode 100644 target/arm/whpx/whpx-all.c
create mode 100644 target/arm/whpx/whpx-stub.c
create mode 100644 target/arm/whpx_arm.h
It seems like there are some build failures for mingw x86_64:
https://github.com/pbo-linaro/qemu-ci/actions/runs/20579084208/job/59103016908
../target/i386/whpx/whpx-all.c: In function 'whpx_accel_init':
../target/i386/whpx/whpx-all.c:2190:19: error: 'struct whpx_state' has
no member named 'kernel_irqchip'; did you mean 'kernel_irqchip_allowed'?
2190 | whpx->kernel_irqchip = true;
| ^~~~~~~~~~~~~~
| kernel_irqchip_allowed
You can cross compile for x86_64 from your windows-arm64 machine using:
https://www.qemu.org/docs/master/devel/build-environment.html#build-on-windows-aarch64
Regards,
Pierrick
