On 2026/1/4 下午11:11, Philippe Mathieu-Daudé wrote:
Hi,
On 4/1/26 03:29, Bibo Mao wrote:
Some CPUCFG capability bits depend on KVM host hypervsior and they
are detected on QEMU. However some CPUCFG bits are irrelative with
hypervsior, here these bits are checked from host machine and set
for VM with host CPU model.
Signed-off-by: Bibo Mao <[email protected]>
---
target/loongarch/cpu.c | 27 ++++++++++++++++++++++++++-
target/loongarch/cpu.h | 8 ++++++++
2 files changed, 34 insertions(+), 1 deletion(-)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index f9255c4f84..b87819c8e0 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -503,7 +503,7 @@ static uint32_t get_host_cpucfg(int number)
static void loongarch_host_initfn(Object *obj)
{
- uint32_t data;
+ uint32_t data, cpucfg, field;
uint64_t cpuid;
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
@@ -513,6 +513,31 @@ static void loongarch_host_initfn(Object *obj)
cpu->env.cpucfg[0] = data;
}
+ /* Set cpucfg bits irrelative with KVM hypervisor */
What do you mean by "irrelative"?
Different from FPU/LSX feature, some features like 128-bit atomic
instruction etc are only indication in cpucfg, there is no enabling or
disabling control function in KVM hypervisor. And there is no exception
in KVM hypervisor when 128-bit atomic instruction is executed if
hardware supports, KVM hypervisor cannot control this.
How about changing the comments like this?
/*
* There is no exception in KVM hypervisor when these intructions are
* executed if HW support, KVM hypervisor cannot control this.
*
* Set cpucfg bits which cannot be controlled by KVM hypervisor.
*/
Regards
Bibo Mao
