RE: [PATCH 05/19] hw/i3c/aspeed_i3c: Add more register fields

[Jamin Lin]

> Subject: [PATCH 05/19] hw/i3c/aspeed_i3c: Add more register fields
> 
> Adds the rest of the Aspeed I3C controller register fields.
> 
> Signed-off-by: Joe Komlodi <koml...@google.com>
> 
> Reviewed-by: Patrick Venture <vent...@google.com>
> ---
>  hw/i3c/aspeed_i3c.c | 54 +++++++++++++++++++++++++++++++++++----------
>  1 file changed, 42 insertions(+), 12 deletions(-)
> 
> diff --git a/hw/i3c/aspeed_i3c.c b/hw/i3c/aspeed_i3c.c index
> cb0332828c..7a16dfec53 100644
> --- a/hw/i3c/aspeed_i3c.c
> +++ b/hw/i3c/aspeed_i3c.c
> @@ -21,28 +21,58 @@
>  /* I3C Controller Registers */
>  REG32(I3C1_REG0, 0x10)
>  REG32(I3C1_REG1, 0x14)
> -    FIELD(I3C1_REG1, I2C_MODE,  0,  1)
> -    FIELD(I3C1_REG1, SA_EN,     15, 1)
> +    FIELD(I3C1_REG1, I2C_MODE,      0,  1)
> +    FIELD(I3C1_REG1, SLV_TEST_MODE, 1,  1)
> +    FIELD(I3C1_REG1, ACT_MODE,      2,  2)
> +    FIELD(I3C1_REG1, PENDING_INT,   4,  4)
> +    FIELD(I3C1_REG1, SA,            8,  7)
> +    FIELD(I3C1_REG1, SA_EN,         15, 1)
> +    FIELD(I3C1_REG1, INST_ID,       16, 4)
>  REG32(I3C2_REG0, 0x20)
>  REG32(I3C2_REG1, 0x24)
> -    FIELD(I3C2_REG1, I2C_MODE,  0,  1)
> -    FIELD(I3C2_REG1, SA_EN,     15, 1)
> +    FIELD(I3C2_REG1, I2C_MODE,      0,  1)
> +    FIELD(I3C2_REG1, SLV_TEST_MODE, 1,  1)
> +    FIELD(I3C2_REG1, ACT_MODE,      2,  2)
> +    FIELD(I3C2_REG1, PENDING_INT,   4,  4)
> +    FIELD(I3C2_REG1, SA,            8,  7)
> +    FIELD(I3C2_REG1, SA_EN,         15, 1)
> +    FIELD(I3C2_REG1, INST_ID,       16, 4)
>  REG32(I3C3_REG0, 0x30)
>  REG32(I3C3_REG1, 0x34)
> -    FIELD(I3C3_REG1, I2C_MODE,  0,  1)
> -    FIELD(I3C3_REG1, SA_EN,     15, 1)
> +    FIELD(I3C3_REG1, I2C_MODE,      0,  1)
> +    FIELD(I3C3_REG1, SLV_TEST_MODE, 1,  1)
> +    FIELD(I3C3_REG1, ACT_MODE,      2,  2)
> +    FIELD(I3C3_REG1, PENDING_INT,   4,  4)
> +    FIELD(I3C3_REG1, SA,            8,  7)
> +    FIELD(I3C3_REG1, SA_EN,         15, 1)
> +    FIELD(I3C3_REG1, INST_ID,       16, 4)
>  REG32(I3C4_REG0, 0x40)
>  REG32(I3C4_REG1, 0x44)
> -    FIELD(I3C4_REG1, I2C_MODE,  0,  1)
> -    FIELD(I3C4_REG1, SA_EN,     15, 1)
> +    FIELD(I3C4_REG1, I2C_MODE,      0,  1)
> +    FIELD(I3C4_REG1, SLV_TEST_MODE, 1,  1)
> +    FIELD(I3C4_REG1, ACT_MODE,      2,  2)
> +    FIELD(I3C4_REG1, PENDING_INT,   4,  4)
> +    FIELD(I3C4_REG1, SA,            8,  7)
> +    FIELD(I3C4_REG1, SA_EN,         15, 1)
> +    FIELD(I3C4_REG1, INST_ID,       16, 4)
>  REG32(I3C5_REG0, 0x50)
>  REG32(I3C5_REG1, 0x54)
> -    FIELD(I3C5_REG1, I2C_MODE,  0,  1)
> -    FIELD(I3C5_REG1, SA_EN,     15, 1)
> +    FIELD(I3C5_REG1, I2C_MODE,      0,  1)
> +    FIELD(I3C5_REG1, SLV_TEST_MODE, 1,  1)
> +    FIELD(I3C5_REG1, ACT_MODE,      2,  2)
> +    FIELD(I3C5_REG1, PENDING_INT,   4,  4)
> +    FIELD(I3C5_REG1, SA,            8,  7)
> +    FIELD(I3C5_REG1, SA_EN,         15, 1)
> +    FIELD(I3C5_REG1, INST_ID,       16, 4)
>  REG32(I3C6_REG0, 0x60)
>  REG32(I3C6_REG1, 0x64)
> -    FIELD(I3C6_REG1, I2C_MODE,  0,  1)
> -    FIELD(I3C6_REG1, SA_EN,     15, 1)
> +    FIELD(I3C6_REG1, I2C_MODE,      0,  1)
> +    FIELD(I3C6_REG1, SLV_TEST_MODE, 1,  1)
> +    FIELD(I3C6_REG1, ACT_MODE,      2,  2)
> +    FIELD(I3C6_REG1, PENDING_INT,   4,  4)
> +    FIELD(I3C6_REG1, SA,            8,  7)
> +    FIELD(I3C6_REG1, SA_EN,         15, 1)
> +    FIELD(I3C6_REG1, INST_ID,       16, 4)
> 
>  static uint64_t aspeed_i3c_read(void *opaque, hwaddr addr, unsigned int size)
> {
> --
> 2.50.0.rc1.591.g9c95f17f64-goog

Reviewed-by: Jamin Lin <jamin_...@aspeedtech.com>

Thanks,
Jamin