Hi, Max:
On 1/8/2026 11:16 PM, Max Chou wrote:
> According to the ISA spec of Zvfofp4min extension,
> "The Zvfofp4min extension requires on the Zve32f extension."
>
> Signed-off-by: Max Chou <[email protected]>
> ---
> target/riscv/cpu.c | 1 +
> target/riscv/cpu_cfg_fields.h.inc | 1 +
> target/riscv/tcg/tcg-cpu.c | 10 ++++++++++
> 3 files changed, 12 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 081891c97a..9d4fc3ab6b 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -193,6 +193,7 @@ const RISCVIsaExtData isa_edata_arr[] = {
> ISA_EXT_DATA_ENTRY(zvfbfwma, PRIV_VERSION_1_12_0, ext_zvfbfwma),
> ISA_EXT_DATA_ENTRY(zvfh, PRIV_VERSION_1_12_0, ext_zvfh),
> ISA_EXT_DATA_ENTRY(zvfhmin, PRIV_VERSION_1_12_0, ext_zvfhmin),
> + ISA_EXT_DATA_ENTRY(zvfofp4min, PRIV_VERSION_1_12_0, ext_zvfofp4min),
> ISA_EXT_DATA_ENTRY(zvfofp8min, PRIV_VERSION_1_12_0, ext_zvfofp8min),
> ISA_EXT_DATA_ENTRY(zvkb, PRIV_VERSION_1_12_0, ext_zvkb),
> ISA_EXT_DATA_ENTRY(zvkg, PRIV_VERSION_1_12_0, ext_zvkg),
> diff --git a/target/riscv/cpu_cfg_fields.h.inc
> b/target/riscv/cpu_cfg_fields.h.inc
> index 59302894af..353a932c36 100644
> --- a/target/riscv/cpu_cfg_fields.h.inc
> +++ b/target/riscv/cpu_cfg_fields.h.inc
> @@ -104,6 +104,7 @@ BOOL_FIELD(ext_zvfbfmin)
> BOOL_FIELD(ext_zvfbfwma)
> BOOL_FIELD(ext_zvfh)
> BOOL_FIELD(ext_zvfhmin)
> +BOOL_FIELD(ext_zvfofp4min)
> BOOL_FIELD(ext_zvfofp8min)
> BOOL_FIELD(ext_smaia)
> BOOL_FIELD(ext_ssaia)
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index ba89436f13..c095bc9efd 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -715,6 +715,11 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu,
> Error **errp)
> return;
> }
>
> + if (cpu->cfg.ext_zvfofp4min && !cpu->cfg.ext_zve32f) {
> + error_setg(errp, "Zvfofp4min extension depends on Zve32f extension");
> + return;
> + }
> +
First check.
> if (cpu->cfg.ext_zvfh && !cpu->cfg.ext_zfhmin) {
> error_setg(errp, "Zvfh extensions requires Zfhmin extension");
> return;
> @@ -738,6 +743,11 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu,
> Error **errp)
> }
> }
>
> + if (cpu->cfg.ext_zvfofp4min && !cpu->cfg.ext_zve32f) {
> + error_setg(errp, "Zvfofp4min extension depends on Zve32f extension");
> + return;
> + }
> +
Re-verified Zvfofp4min -> Zve32f.
Thanks,
Chao
> if ((cpu->cfg.ext_zdinx || cpu->cfg.ext_zhinxmin) &&
> !cpu->cfg.ext_zfinx) {
> error_setg(errp, "Zdinx/Zhinx/Zhinxmin extensions require Zfinx");
> return;
