On Fri, Dec 19, 2025 at 12:30 AM Chao Liu <[email protected]> wrote:

> On Tue,  2 Dec 2025 16:22:59 -0800, Tuan Phan wrote:
> > This patch enables TPM2 support in the RISC-V virt machine ACPI builder.
> >
> > Signed-off-by: Tuan Phan <[email protected]>
> > ---
> >  hw/riscv/virt-acpi-build.c | 56 ++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 56 insertions(+)
> >
> > diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> > index f1406cb68339..b5bf812a9d36 100644
> > --- a/hw/riscv/virt-acpi-build.c
> > +++ b/hw/riscv/virt-acpi-build.c
> > @@ -32,6 +32,7 @@
> >  #include "hw/intc/riscv_aclint.h"
> >  #include "hw/nvram/fw_cfg_acpi.h"
> >  #include "hw/pci-host/gpex.h"
> > +#include "hw/platform-bus.h"
> >  #include "hw/riscv/virt.h"
> >  #include "hw/riscv/numa.h"
> >  #include "hw/virtio/virtio-acpi.h"
> > @@ -39,6 +40,7 @@
> >  #include "qapi/error.h"
> >  #include "qemu/error-report.h"
> >  #include "system/reset.h"
> > +#include "system/tpm.h"
> >
> >  #define ACPI_BUILD_TABLE_SIZE             0x20000
> >  #define ACPI_BUILD_INTC_ID(socket, index) ((socket << 24) | (index))
> > @@ -224,6 +226,41 @@ static void acpi_dsdt_add_iommu_sys(Aml *scope,
> const
> MemMapEntry *iommu_memmap,
> >      aml_append(scope, dev);
> >  }
> >
> > +#ifdef CONFIG_TPM
> > +static void acpi_dsdt_add_tpm(Aml *scope, RISCVVirtState *s)
> > +{
> > +    PlatformBusDevice *pbus = PLATFORM_BUS_DEVICE(s->platform_bus_dev);
> > +    hwaddr pbus_base = s->memmap[VIRT_PLATFORM_BUS].base;
> > +    SysBusDevice *sbdev = SYS_BUS_DEVICE(tpm_find());
> > +    MemoryRegion *sbdev_mr;
> > +    hwaddr tpm_base;
> > +
> > +    if (!sbdev) {
> > +        return;
> > +    }
> > +
> > +    tpm_base = platform_bus_get_mmio_addr(pbus, sbdev, 0);
> > +    assert(tpm_base != -1);
> > +
> I suggest reporting an error message when the tpm_base check fails.
>
>     if (tpm_base == -1) {
>         error_report("Failed to get TPM MMIO address");
>         exit(1);
>     }
>
> Thanks,
> Chao
>

Thanks Chao, I will change it as per your suggestion. BTW, I will resend
this patch from my new email from Qualcomm.

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