On Fri, 19 Dec 2025 17:26:34 +0800 Victor Zhao <[email protected]> wrote:
> When vfio_pci_pre_reset() disables MSI/MSI-X, the device may fall back > to INTx mode. The code then clears PCI_COMMAND_INTX_DISABLE, allowing > the device to assert INTx. Since interrupt handlers have already been > removed, this causes unhandled interrupts and kernel "nobody cared" > warnings. Is there a bug report to go along with this? > Fix by not clearing PCI_COMMAND_INTX_DISABLE. The device reset will > restore it to default state. > > Cc: [email protected] > Signed-off-by: Victor Zhao <[email protected]> > --- > hw/vfio/pci.c | 8 ++------ > 1 file changed, 2 insertions(+), 6 deletions(-) > > diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c > index b46b1305a7..1681134cf2 100644 > --- a/hw/vfio/pci.c > +++ b/hw/vfio/pci.c > @@ -2616,13 +2616,9 @@ void vfio_pci_pre_reset(VFIOPCIDevice *vdev) > > vfio_disable_interrupts(vdev); > > - /* > - * Stop any ongoing DMA by disconnecting I/O, MMIO, and bus master. > - * Also put INTx Disable in known state. > - */ > + /* Stop any ongoing DMA by disconnecting I/O, MMIO, and bus master. */ > cmd = vfio_pci_read_config(pdev, PCI_COMMAND, 2); > - cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | > - PCI_COMMAND_INTX_DISABLE); > + cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); > vfio_pci_write_config(pdev, PCI_COMMAND, cmd, 2); > > /* Make sure the device is in D0 */ I think the key here was the "known state", where the PCI spec defines that INTX_DISABLE should be clear after reset. If we don't touch it, the set bit will be saved and restored around reset. However, the first thing we do in post-reset is to configure INTx, and I think this results in INTX_DISABLE being cleared such that the post-reset state seen by the VM is consistent to the spec. Do you confirm? It might be worthwhile to expand the comment in that regard. Thanks, Alex
