On 1/8/2026 10:26 AM, Max Chou wrote:
Signed-off-by: Max Chou <[email protected]> ---
Reviewed-by: Daniel Henrique Barboza <[email protected]>
target/riscv/translate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index f687c75fe4..911d3932f9 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -101,6 +101,7 @@ typedef struct DisasContext { bool cfg_vta_all_1s; bool vstart_eq_zero; bool vl_eq_vlmax; + bool altfmt; CPUState *cs; TCGv zero; /* actual address width */ @@ -1302,6 +1303,7 @@ static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cs); RISCVCPU *cpu = RISCV_CPU(cs); uint32_t tb_flags = ctx->base.tb->flags; + uint64_t ext_tb_flags = ctx->base.tb->cs_base;ctx->pc_save = ctx->base.pc_first;ctx->priv = FIELD_EX32(tb_flags, TB_FLAGS, PRIV); @@ -1321,6 +1323,7 @@ static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) ctx->cfg_vta_all_1s = cpu->cfg.rvv_ta_all_1s; ctx->vstart_eq_zero = FIELD_EX32(tb_flags, TB_FLAGS, VSTART_EQ_ZERO); ctx->vl_eq_vlmax = FIELD_EX32(tb_flags, TB_FLAGS, VL_EQ_VLMAX); + ctx->altfmt = FIELD_EX64(ext_tb_flags, EXT_TB_FLAGS, ALTFMT); ctx->misa_mxl_max = mcc->def->misa_mxl_max; ctx->xl = FIELD_EX32(tb_flags, TB_FLAGS, XL); ctx->address_xl = FIELD_EX32(tb_flags, TB_FLAGS, AXL);
