Hi; here's the first pullreq for arm for 2026. I had a big backlog of code review after the holidays so this is mostly "things that were fairly easy to review and collect up"...
-- PMM The following changes since commit 4cfa1ce0365f56832f46ed8a82d8bd954d16be11: Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2026-01-15 11:29:21 +1100) are available in the Git repository at: https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20260115 for you to fetch changes up to 4efed64ffcdb99b977ad0b2129a9c0208456a6c9: target/arm: Rename access_aa64_tid5() to access_tid5() (2026-01-15 15:30:16 +0000) ---------------------------------------------------------------- target-arm queue: * hw/arm/raspi: remove duplicate include * target/arm: Enable FEAT_ASID2 emulation * hw/char/cmsdk-apb-uart.c: log guest_errors for r/w to disabled uart * hw/arm: Re-enable the MAX78000FTHR machine in qemu-system-arm/aarch64 * target/arm/ptw: make granule_protection_check usable without a cpu * hw/arm/omap: Remove omap_badwidth_* functions * hw/arm/smmu: add memory regions as property for an SMMU instance * docs/system/generic-loader: clarify * tests/functional: migrate aspeed_rainier image * target/arm: Correctly handle HCR.TID1 and TID3 traps on v7A CPUs ---------------------------------------------------------------- Alex Bennée (1): tests/functional: migrate aspeed_rainier image Jim MacArthur (4): target/arm: Enable ID_AA64MMFR4_EL1 register target/arm: Allow writes to FNG1, FNG0, A2 target/arm/tcg/cpu64.c: Enable ASID2 for cpu_max tests: Add test for ASID2 and write/read of feature bits Osama Abdelkader (1): hw/arm/raspi: remove duplicate include Peter Maydell (14): hw/sd/omap_mmc: Remove omap_badwidth_* calls hw/i2c/omap_i2c: Remove omap_badwidth_* calls hw/gpio/omap_gpio: Remove omap_badwidth_* calls hw/dma/omap_dma: Remove omap_badwidth_* calls hw/arm/omap1: Remove omap_badwidth_read* calls hw/arm/omap1: Remove omap_badwidth_write* calls hw/arm/omap1: Remove omap_badwidth_* implementations docs/system/generic-loader: Clarify behaviour of cpu-num docs/system/generic-loader: Don't mention QemuOpts implementation detail docs/system/generic-loader: move TODO to source code target/arm: Don't specify ID_PFR1 accessfn twice target/arm: Correctly honour HCR.TID3 for v7A cores target/arm: Correctly trap HCR.TID1 registers in v7A target/arm: Rename access_aa64_tid5() to access_tid5() Philippe Mathieu-Daudé (1): hw/arm: Re-enable the MAX78000FTHR machine in qemu-system-arm/aarch64 Pierrick Bouvier (2): target/arm/ptw: make granule_protection_check usable without a cpu hw/arm/smmu: add memory regions as property for an SMMU instance Tao Tang (1): target/arm: Move ARMSecuritySpace to a common header julia (1): hw/char/cmsdk-apb-uart.c: log guest_errors for r/w to disabled uart docs/system/arm/emulation.rst | 1 + docs/system/generic-loader.rst | 56 ++++---- hw/arm/max78000fthr.c | 3 +- hw/arm/omap1.c | 203 +++++++++++++------------- hw/arm/raspi.c | 1 - hw/arm/sbsa-ref.c | 16 ++- hw/arm/smmu-common.c | 11 ++ hw/arm/virt.c | 13 +- hw/char/cmsdk-apb-uart.c | 8 ++ hw/core/generic-loader.c | 18 +++ hw/dma/omap_dma.c | 7 +- hw/gpio/omap_gpio.c | 7 +- hw/i2c/omap_i2c.c | 7 +- hw/sd/omap_mmc.c | 7 +- include/hw/arm/arm-security.h | 37 +++++ include/hw/arm/omap.h | 10 -- include/hw/arm/smmu-common.h | 4 + include/hw/arm/virt.h | 2 + target/arm/cpu-features.h | 7 + target/arm/cpu-sysregs.h.inc | 1 + target/arm/cpu.h | 59 ++++---- target/arm/helper.c | 211 +++++++++++++++------------- target/arm/internals.h | 5 + target/arm/ptw.c | 57 +++++--- target/arm/tcg/cpu64.c | 4 + tests/functional/arm/test_aspeed_rainier.py | 6 +- tests/tcg/aarch64/system/asid2.c | 76 ++++++++++ 27 files changed, 537 insertions(+), 300 deletions(-) create mode 100644 include/hw/arm/arm-security.h create mode 100644 tests/tcg/aarch64/system/asid2.c
