Hi Eric,

On 2026/1/15 17:14, Eric Auger wrote:
Hi Tao,

On 12/24/25 4:46 AM, Tao Tang wrote:
Switch STE/CD bitfield definitions and accessors to the
'hw/registerfields.h' REG/FIELD API.

Signed-off-by: Tao Tang <[email protected]>
---
  include/hw/arm/smmuv3-common.h | 169 +++++++++++++++++++++++----------
  1 file changed, 120 insertions(+), 49 deletions(-)

diff --git a/include/hw/arm/smmuv3-common.h b/include/hw/arm/smmuv3-common.h
index 9da817f41a..b6da2fd62c 100644
--- a/include/hw/arm/smmuv3-common.h
+++ b/include/hw/arm/smmuv3-common.h
@@ -11,6 +11,8 @@
  #ifndef HW_ARM_SMMUV3_COMMON_H
  #define HW_ARM_SMMUV3_COMMON_H
+#include "hw/registerfields.h"
+
  /* Configuration Data */
/* STE Level 1 Descriptor */
@@ -35,63 +37,132 @@ typedef struct CD {
/* STE fields */ -#define STE_VALID(x) extract32((x)->word[0], 0, 1)
+REG32(STE_0, 0)
+    FIELD(STE_0, VALID, 0, 1)
+    FIELD(STE_0, CONFIG, 1, 3)
+    FIELD(STE_0, S1FMT, 4, 2)
+    FIELD(STE_0, CTXPTR_LO, 6, 26)
+REG32(STE_1, 4)
+    FIELD(STE_1, CTXPTR_HI, 0, 16)
not related to your patch, but shouldn't it be 24 instead of 16

+REG32(STE_6, 24)
+    FIELD(STE_6, S2TTB_LO, 4, 28)
+REG32(STE_7, 28)
+    FIELD(STE_7, S2TTB_HI, 0, 16)
same here?

+REG32(CD_2, 8)
+    FIELD(CD_2, HAD0, 1, 1)
+    FIELD(CD_2, TTB0_LO, 4, 28)
+REG32(CD_3, 12)
+    FIELD(CD_3, TTB0_HI, 0, 19)
I think it is 24 now
+REG32(CD_4, 16)
+    FIELD(CD_4, HAD1, 1, 1)
+    FIELD(CD_4, TTB1_LO, 4, 28)
+REG32(CD_5, 20)
+    FIELD(CD_5, TTB1_HI, 0, 19)
same

Thank you for your review and the careful observation — you are absolutely correct.


These field width definitions originally came from the existing implementation when I moved them into the new REG/FIELD API, so I did not update the widths at that time.


Would you prefer that I submit a separate patch to correct the field widths after this series patch are merged?


Best regards,

Tao

Otherwise looks good to me

Reviewed-by: Eric Auger <[email protected]>

Eric


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