The following changes since commit 42a5675aa9dd718f395ca3279098051dfdbbc6e1:
Merge tag 'accel-20260116' of https://github.com/philmd/qemu into staging (2026-01-16 22:26:36 +1100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20260119 for you to fetch changes up to 239b9d0488b270f5781fd7cd7139262c165d0351: include/qemu/atomic: Drop aligned_{u}int64_t (2026-01-17 10:46:51 +1100) ---------------------------------------------------------------- Remove support for 32-bit hosts. ---------------------------------------------------------------- Richard Henderson (54): gitlab-ci: Drop build-wasm32-32bit tests/docker/dockerfiles: Drop wasm32 from emsdk-wasm-cross.docker gitlab: Remove 32-bit host testing meson: Reject 32-bit hosts meson: Drop cpu == wasm32 tests *: Remove arm host support bsd-user: Fix __i386__ test for TARGET_HAS_STAT_TIME_T_EXT *: Remove __i386__ tests *: Remove i386 host support host/include/x86_64/bufferiszero: Remove no SSE2 fallback meson: Remove cpu == x86 tests *: Remove ppc host support tcg/i386: Remove TCG_TARGET_REG_BITS tests tcg/x86_64: Rename from i386 tcg/ppc64: Rename from ppc meson: Drop host_arch rename for mips64 meson: Drop host_arch rename for riscv64 meson: Remove cpu == riscv32 tests tcg: Make TCG_TARGET_REG_BITS common tcg: Replace TCG_TARGET_REG_BITS / 8 *: Drop TCG_TARGET_REG_BITS test for prefer_i64 tcg: Remove INDEX_op_brcond2_i32 tcg: Remove INDEX_op_setcond2_i32 tcg: Remove INDEX_op_dup2_vec tcg/tci: Drop TCG_TARGET_REG_BITS tests tcg/tci: Remove glue TCG_TARGET_REG_BITS renames tcg: Drop TCG_TARGET_REG_BITS test in region.c tcg: Drop TCG_TARGET_REG_BITS tests in tcg-op.c tcg: Drop TCG_TARGET_REG_BITS tests in tcg-op-gvec.c tcg: Drop TCG_TARGET_REG_BITS tests in tcg-op-ldst.c tcg: Drop TCG_TARGET_REG_BITS tests in tcg.c tcg: Drop TCG_TARGET_REG_BITS tests in tcg-internal.h tcg: Drop TCG_TARGET_REG_BITS test in tcg-has.h include/tcg: Drop TCG_TARGET_REG_BITS tests target/i386/tcg: Drop TCG_TARGET_REG_BITS test target/riscv: Drop TCG_TARGET_REG_BITS test accel/tcg/runtime: Remove 64-bit shift helpers accel/tcg/runtime: Remove helper_nonatomic_cmpxchgo tcg: Unconditionally define atomic64 helpers accel/tcg: Drop CONFIG_ATOMIC64 checks from ldst_atomicicy.c.inc accel/tcg: Drop CONFIG_ATOMIC64 test from translator.c linux-user/arm: Drop CONFIG_ATOMIC64 test linux-user/hppa: Drop CONFIG_ATOMIC64 test target/arm: Drop CONFIG_ATOMIC64 tests target/hppa: Drop CONFIG_ATOMIC64 test target/m68k: Drop CONFIG_ATOMIC64 tests target/s390x: Drop CONFIG_ATOMIC64 tests target/s390x: Simplify atomicity check in do_csst migration: Drop use of Stat64 block: Drop use of Stat64 util: Remove stats64 include/qemu/atomic: Drop qatomic_{read,set}_[iu]64 meson: Remove CONFIG_ATOMIC64 include/qemu/atomic: Drop aligned_{u}int64_t accel/tcg/atomic_template.h | 4 +- accel/tcg/tcg-runtime.h | 23 - bsd-user/syscall_defs.h | 2 +- host/include/i386/host/cpuinfo.h | 41 - host/include/i386/host/crypto/aes-round.h | 152 - host/include/i386/host/crypto/clmul.h | 29 - host/include/ppc/host/cpuinfo.h | 30 - host/include/ppc/host/crypto/aes-round.h | 182 - host/include/ppc64/host/cpuinfo.h | 31 +- host/include/ppc64/host/crypto/aes-round.h | 183 +- host/include/{riscv => riscv64}/host/cpuinfo.h | 0 host/include/x86_64/host/cpuinfo.h | 42 +- host/include/x86_64/host/crypto/aes-round.h | 153 +- host/include/x86_64/host/crypto/clmul.h | 30 +- include/accel/tcg/cpu-ldst-common.h | 9 - include/block/block_int-common.h | 3 +- include/qemu/atomic.h | 39 +- include/qemu/cacheflush.h | 2 +- include/qemu/osdep.h | 6 +- include/qemu/processor.h | 2 +- include/qemu/stats64.h | 199 -- include/qemu/timer.h | 9 - include/system/cpu-timers-internal.h | 2 +- include/tcg/helper-info.h | 2 +- .../tcg/target-reg-bits.h | 8 +- include/tcg/tcg-op.h | 9 +- include/tcg/tcg-opc.h | 9 +- include/tcg/tcg.h | 29 +- linux-user/include/host/arm/host-signal.h | 43 - linux-user/include/host/i386/host-signal.h | 38 - .../include/host/{mips => mips64}/host-signal.h | 0 linux-user/include/host/ppc/host-signal.h | 39 - .../include/host/{riscv => riscv64}/host-signal.h | 0 migration/migration-stats.h | 36 +- tcg/aarch64/tcg-target-reg-bits.h | 12 - tcg/arm/tcg-target-con-set.h | 47 - tcg/arm/tcg-target-con-str.h | 26 - tcg/arm/tcg-target-has.h | 73 - tcg/arm/tcg-target-mo.h | 13 - tcg/arm/tcg-target-reg-bits.h | 12 - tcg/arm/tcg-target.h | 73 - tcg/i386/tcg-target-reg-bits.h | 16 - tcg/loongarch64/tcg-target-reg-bits.h | 21 - tcg/mips/tcg-target-reg-bits.h | 16 - tcg/{mips => mips64}/tcg-target-con-set.h | 0 tcg/{mips => mips64}/tcg-target-con-str.h | 0 tcg/{mips => mips64}/tcg-target-has.h | 0 tcg/{mips => mips64}/tcg-target-mo.h | 0 tcg/{mips => mips64}/tcg-target.h | 0 tcg/{ppc => ppc64}/tcg-target-con-set.h | 0 tcg/{ppc => ppc64}/tcg-target-con-str.h | 0 tcg/{ppc => ppc64}/tcg-target-has.h | 0 tcg/{ppc => ppc64}/tcg-target-mo.h | 0 tcg/{ppc => ppc64}/tcg-target.h | 0 tcg/riscv/tcg-target-reg-bits.h | 19 - tcg/{riscv => riscv64}/tcg-target-con-set.h | 0 tcg/{riscv => riscv64}/tcg-target-con-str.h | 0 tcg/{riscv => riscv64}/tcg-target-has.h | 0 tcg/{riscv => riscv64}/tcg-target-mo.h | 0 tcg/{riscv => riscv64}/tcg-target.h | 0 tcg/s390x/tcg-target-reg-bits.h | 17 - tcg/sparc64/tcg-target-reg-bits.h | 12 - tcg/tcg-has.h | 5 - tcg/tcg-internal.h | 21 +- tcg/tci/tcg-target-has.h | 2 - tcg/tci/tcg-target-mo.h | 2 +- tcg/tci/tcg-target-reg-bits.h | 18 - tcg/{i386 => x86_64}/tcg-target-con-set.h | 0 tcg/{i386 => x86_64}/tcg-target-con-str.h | 0 tcg/{i386 => x86_64}/tcg-target-has.h | 8 +- tcg/{i386 => x86_64}/tcg-target-mo.h | 0 tcg/{i386 => x86_64}/tcg-target.h | 13 +- accel/kvm/kvm-all.c | 2 +- accel/qtest/qtest.c | 4 +- accel/tcg/cputlb.c | 37 +- accel/tcg/icount-common.c | 25 +- accel/tcg/tcg-runtime.c | 15 - accel/tcg/translator.c | 4 +- accel/tcg/user-exec.c | 2 - block/io.c | 10 +- block/qapi.c | 2 +- disas/disas-host.c | 9 - hw/display/xenfb.c | 10 +- hw/virtio/virtio-mem.c | 2 +- linux-user/arm/cpu_loop.c | 19 +- linux-user/hppa/cpu_loop.c | 14 +- linux-user/mmap.c | 2 +- linux-user/syscall.c | 9 - migration/cpu-throttle.c | 4 +- migration/migration-stats.c | 16 +- migration/migration.c | 24 +- migration/multifd-nocomp.c | 2 +- migration/multifd-zero-page.c | 4 +- migration/multifd.c | 12 +- migration/qemu-file.c | 6 +- migration/ram.c | 30 +- migration/rdma.c | 8 +- system/dirtylimit.c | 2 +- target/arm/ptw.c | 18 +- target/arm/tcg/gengvec.c | 32 +- target/arm/tcg/gengvec64.c | 4 +- target/arm/tcg/translate-sve.c | 26 +- target/hppa/op_helper.c | 6 +- target/i386/cpu.c | 10 - target/m68k/op_helper.c | 7 +- target/s390x/tcg/mem_helper.c | 18 +- tcg/optimize.c | 322 -- tcg/region.c | 12 - tcg/tcg-op-gvec.c | 113 +- tcg/tcg-op-ldst.c | 130 +- tcg/tcg-op-vec.c | 14 +- tcg/tcg-op.c | 765 +---- tcg/tcg.c | 376 +-- tcg/tci.c | 73 +- tests/unit/test-rcu-list.c | 17 +- util/atomic64.c | 85 - util/cacheflush.c | 4 +- util/qsp.c | 12 +- util/stats64.c | 148 - .gitlab-ci.d/buildtest.yml | 9 - .gitlab-ci.d/container-cross.yml | 20 - .gitlab-ci.d/containers.yml | 3 - .gitlab-ci.d/crossbuilds.yml | 45 - MAINTAINERS | 16 +- accel/tcg/atomic_common.c.inc | 32 - accel/tcg/ldst_atomicity.c.inc | 149 +- common-user/host/arm/safe-syscall.inc.S | 108 - common-user/host/i386/safe-syscall.inc.S | 127 - .../host/{mips => mips64}/safe-syscall.inc.S | 0 common-user/host/ppc/safe-syscall.inc.S | 107 - .../host/{riscv => riscv64}/safe-syscall.inc.S | 0 configure | 52 +- docs/about/deprecated.rst | 29 - docs/about/removed-features.rst | 6 + docs/devel/tcg-ops.rst | 32 +- host/include/i386/host/bufferiszero.c.inc | 125 - host/include/x86_64/host/bufferiszero.c.inc | 121 +- meson.build | 105 +- target/i386/tcg/emit.c.inc | 39 +- target/riscv/insn_trans/trans_rvv.c.inc | 56 +- tcg/arm/tcg-target-opc.h.inc | 16 - tcg/arm/tcg-target.c.inc | 3489 -------------------- tcg/loongarch64/tcg-target.c.inc | 4 +- tcg/{mips => mips64}/tcg-target-opc.h.inc | 0 tcg/{mips => mips64}/tcg-target.c.inc | 0 tcg/{ppc => ppc64}/tcg-target-opc.h.inc | 0 tcg/{ppc => ppc64}/tcg-target.c.inc | 2 +- tcg/{riscv => riscv64}/tcg-target-opc.h.inc | 0 tcg/{riscv => riscv64}/tcg-target.c.inc | 4 +- tcg/tci/tcg-target.c.inc | 84 +- tcg/{i386 => x86_64}/tcg-target-opc.h.inc | 0 tcg/{i386 => x86_64}/tcg-target.c.inc | 552 +--- tests/docker/dockerfiles/emsdk-wasm-cross.docker | 15 +- util/meson.build | 4 - 154 files changed, 1169 insertions(+), 8460 deletions(-) delete mode 100644 host/include/i386/host/cpuinfo.h delete mode 100644 host/include/i386/host/crypto/aes-round.h delete mode 100644 host/include/i386/host/crypto/clmul.h delete mode 100644 host/include/ppc/host/cpuinfo.h delete mode 100644 host/include/ppc/host/crypto/aes-round.h rename host/include/{riscv => riscv64}/host/cpuinfo.h (100%) delete mode 100644 include/qemu/stats64.h rename tcg/ppc/tcg-target-reg-bits.h => include/tcg/target-reg-bits.h (71%) delete mode 100644 linux-user/include/host/arm/host-signal.h delete mode 100644 linux-user/include/host/i386/host-signal.h rename linux-user/include/host/{mips => mips64}/host-signal.h (100%) delete mode 100644 linux-user/include/host/ppc/host-signal.h rename linux-user/include/host/{riscv => riscv64}/host-signal.h (100%) delete mode 100644 tcg/aarch64/tcg-target-reg-bits.h delete mode 100644 tcg/arm/tcg-target-con-set.h delete mode 100644 tcg/arm/tcg-target-con-str.h delete mode 100644 tcg/arm/tcg-target-has.h delete mode 100644 tcg/arm/tcg-target-mo.h delete mode 100644 tcg/arm/tcg-target-reg-bits.h delete mode 100644 tcg/arm/tcg-target.h delete mode 100644 tcg/i386/tcg-target-reg-bits.h delete mode 100644 tcg/loongarch64/tcg-target-reg-bits.h delete mode 100644 tcg/mips/tcg-target-reg-bits.h rename tcg/{mips => mips64}/tcg-target-con-set.h (100%) rename tcg/{mips => mips64}/tcg-target-con-str.h (100%) rename tcg/{mips => mips64}/tcg-target-has.h (100%) rename tcg/{mips => mips64}/tcg-target-mo.h (100%) rename tcg/{mips => mips64}/tcg-target.h (100%) rename tcg/{ppc => ppc64}/tcg-target-con-set.h (100%) rename tcg/{ppc => ppc64}/tcg-target-con-str.h (100%) rename tcg/{ppc => ppc64}/tcg-target-has.h (100%) rename tcg/{ppc => ppc64}/tcg-target-mo.h (100%) rename tcg/{ppc => ppc64}/tcg-target.h (100%) delete mode 100644 tcg/riscv/tcg-target-reg-bits.h rename tcg/{riscv => riscv64}/tcg-target-con-set.h (100%) rename tcg/{riscv => riscv64}/tcg-target-con-str.h (100%) rename tcg/{riscv => riscv64}/tcg-target-has.h (100%) rename tcg/{riscv => riscv64}/tcg-target-mo.h (100%) rename tcg/{riscv => riscv64}/tcg-target.h (100%) delete mode 100644 tcg/s390x/tcg-target-reg-bits.h delete mode 100644 tcg/sparc64/tcg-target-reg-bits.h delete mode 100644 tcg/tci/tcg-target-reg-bits.h rename tcg/{i386 => x86_64}/tcg-target-con-set.h (100%) rename tcg/{i386 => x86_64}/tcg-target-con-str.h (100%) rename tcg/{i386 => x86_64}/tcg-target-has.h (92%) rename tcg/{i386 => x86_64}/tcg-target-mo.h (100%) rename tcg/{i386 => x86_64}/tcg-target.h (86%) delete mode 100644 util/atomic64.c delete mode 100644 util/stats64.c delete mode 100644 common-user/host/arm/safe-syscall.inc.S delete mode 100644 common-user/host/i386/safe-syscall.inc.S rename common-user/host/{mips => mips64}/safe-syscall.inc.S (100%) delete mode 100644 common-user/host/ppc/safe-syscall.inc.S rename common-user/host/{riscv => riscv64}/safe-syscall.inc.S (100%) delete mode 100644 host/include/i386/host/bufferiszero.c.inc delete mode 100644 tcg/arm/tcg-target-opc.h.inc delete mode 100644 tcg/arm/tcg-target.c.inc rename tcg/{mips => mips64}/tcg-target-opc.h.inc (100%) rename tcg/{mips => mips64}/tcg-target.c.inc (100%) rename tcg/{ppc => ppc64}/tcg-target-opc.h.inc (100%) rename tcg/{ppc => ppc64}/tcg-target.c.inc (99%) rename tcg/{riscv => riscv64}/tcg-target-opc.h.inc (100%) rename tcg/{riscv => riscv64}/tcg-target.c.inc (99%) rename tcg/{i386 => x86_64}/tcg-target-opc.h.inc (100%) rename tcg/{i386 => x86_64}/tcg-target.c.inc (89%)
