Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
---
target/i386/tcg/emit.c.inc | 37 +++++++++----------------------------
1 file changed, 9 insertions(+), 28 deletions(-)
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index 41bf047b8d..639a1eb638 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -2094,34 +2094,15 @@ static void gen_IMUL3(DisasContext *s, X86DecodedInsn
*decode)
case MO_32:
#ifdef TARGET_X86_64
- if (TCG_TARGET_REG_BITS == 64) {
- /*
- * This produces fewer TCG ops, and better code if flags are
needed,
- * but it requires a 64-bit multiply even if they are not. Use it
- * only if the target has 64-bits registers.
- *
- * s->T0 is already sign-extended.
- */
- tcg_gen_ext32s_tl(s->T1, s->T1);
- tcg_gen_mul_tl(s->T0, s->T0, s->T1);
- /* Compare the full result to the extension of the truncated
result. */
- tcg_gen_ext32s_tl(s->T1, s->T0);
- cc_src_rhs = s->T0;
- } else {
- /* Variant that only needs a 32-bit widening multiply. */
- TCGv_i32 hi = tcg_temp_new_i32();
- TCGv_i32 lo = tcg_temp_new_i32();
- tcg_gen_trunc_tl_i32(lo, s->T0);
- tcg_gen_trunc_tl_i32(hi, s->T1);
- tcg_gen_muls2_i32(lo, hi, lo, hi);
- tcg_gen_extu_i32_tl(s->T0, lo);
-
- cc_src_rhs = tcg_temp_new();
- tcg_gen_extu_i32_tl(cc_src_rhs, hi);
- /* Compare the high part to the sign bit of the truncated result */
- tcg_gen_sari_i32(lo, lo, 31);
- tcg_gen_extu_i32_tl(s->T1, lo);
- }
+ /*
+ * This produces fewer TCG ops, and better code if flags are needed.
+ * s->T0 is already sign-extended.
+ */
+ tcg_gen_ext32s_tl(s->T1, s->T1);
+ tcg_gen_mul_tl(s->T0, s->T0, s->T1);
+ /* Compare the full result to the extension of the truncated result.
*/
+ tcg_gen_ext32s_tl(s->T1, s->T0);
+ cc_src_rhs = s->T0;
break;
case MO_64:
--
2.43.0
