On 06/12/25 11:26 am, Aditya Gupta wrote:
Overview ========= Implemented MPIPL (Memory Preserving IPL, aka fadump) on PowerNV machine in QEMU. Note: It's okay if this isn't merged as there might be less users. Sending for archieval purpose, as the patches can be referred for how fadump/mpipl can be implemented in baremetal/PowerNV/any other arch QEMU. Fadump is an alternative dump mechanism to kdump, in which we the firmware does a memory preserving boot, and the second/crashkernel is booted fresh like a normal system reset, instead of the crashed kernel loading the second/crashkernel in case of kdump. MPIPL in PowerNV, is similar to fadump in Pseries. The idea is same, memory preserving, where in PowerNV we are assisted by SBE (Self Boot Engine) & Hostboot, while in Pseries we are assisted by PHyp (Power Hypervisor) For implementing in baremetal/powernv QEMU, we need to export a "ibm,opal/dump" node in the device tree, to tell the kernel we support MPIPL
Once kernel sees the support, and "fadump=on" is passed on commandline, kernel will register memory regions to preserve with Skiboot. Kernel sends these data using OPAL calls, after which skiboot/opal saves the memory region details to MDST and MDDT tables (S-source, D-destination) Skiboot then triggers the "S0 Interrupt" to the SBE (Self Boot Engine), along with OPAL's relocated base address.
This sounds as though skiboot triggers S0 Interrupt right after kernel registers through OPAL calls, which is not the case. Please make it explicit that kernel initiates fadump with another OPAL call after registering.. - Hari
