On 16/1/26 14:52, Mohamed Mediouni wrote:
Mohamed Mediouni (24):
qtest: hw/arm: virt: skip ACPI test for ITS off
hw/arm: virt: add GICv2m for the case when ITS is not available
tests: data: update AArch64 ACPI tables
hw/arm: virt: cleanly fail on attempt to use the platform vGIC
together with ITS
hw: arm: virt: rework MSI-X configuration
docs: arm: update virt machine model description
whpx: Move around files before introducing AArch64 support
whpx: reshuffle common code
whpx: ifdef out winhvemulation on non-x86_64
whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define
hw, target, accel: whpx: change apic_in_platform to kernel_irqchip
whpx: interrupt controller support
whpx: add arm64 support
whpx: change memory management logic
target/arm: cpu: mark WHPX as supporting PSCI 1.3
whpx: arm64: clamp down IPA size
hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX
and HVF
whpx: arm64: implement -cpu host
target/arm: whpx: instantiate GIC early
whpx: arm64: gicv3: add migration blocker
whpx: enable arm64 builds
whpx: arm64: check for physical address width after WHPX availability
whpx: arm64: add partition-wide reset on the reboot path
MAINTAINERS: update the list of maintained files for WHPX
Note for myself (rthogonal to this work): thinking about generic
accel/ infra we could add these common methods to AccelClass and
get rid of some per-accel #ifdef'ry:
- accel_has_in_kernel_irq_handling()
- accel_arch_get_cpu_features_from_host()
- accel_arch_set_cpu_features_from_host()
