Kane, Jamin,

For some reason, I don't receive your proposals anymore. My provider
seems to drop silently these emails. Have you changed anything recently ?

Thanks,

C.

On 1/20/26 06:18, Kane Chen via qemu development wrote:
From: Kane-Chen-AS <[email protected]>

Hi all,

LTPI (LVDS Tunneling Protocol & Interface) is defined in the OCP DC-SCM
2.0 specification (see Figure 2):
https://www.opencompute.org/documents/ocp-dc-scm-2-0-ltpi-ver-1-0-pdf

LTPI provides a protocol and physical interface for tunneling various
low-speed signals between the Host Processor Module (HPM) and the
Satellite Controller Module (SCM). In Figure 2 of the specification,
the AST27x0 SoC (left) integrates two LTPI controllers, allowing it to
connect to up to two AST1700 boards. On the other side, the AST1700
consolidates HPM FPGA functions and multiple peripheral interfaces
(GPIO, UART, I2C, I3C, etc.) onto a single board.

Because the AST1700 exposes additional I/O interfaces (GPIO, I2C, I3C,
and others), it acts as an I/O expander. Once connected over LTPI,
the AST27x0 can control additional downstream devices through this link.

This patch series is based on the aspeed_next branch and incorporates
recent I2C bus label changes.
Ref: 
https://patchwork.kernel.org/project/qemu-devel/patch/[email protected]/

It introduces a basic LTPI controller model and wires it into the
AST27x0 SoC. The series also adds the AST1700-specific LTPI expander
device and incrementally connects common peripherals on the AST1700
model. For the I3C block, which may cause kernel crashes, its MMIO
region is modeled as an unimplemented device to reserve address space
and make the missing functionality explicit, ensuring stable guest
probing.

In the official release images, the AST1700 functions are not included
by default. To test the AST1700-related functionality, please include
the following DTS files for probing:
https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v6.6/arch/arm64/boot/dts/aspeed/aspeed-ltpi0.dtsi
https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v6.6/arch/arm64/boot/dts/aspeed/aspeed-ltpi1.dtsi

After including these DTS files in the BMC image, you can verify LTPI
functionality using the following scenarios:

1. In U-Boot:
    Run the ltpi command to trigger the LTPI connection and display the
    current connection status.
2. In BMC Linux:
    Run i2cdetect -y <16-38> to scan and test the I2C buses exposed by
    the AST1700.

Any feedback or suggestions are appreciated!

Kane

---

ChangeLog
---------
v5:
- Add functional test case for AST1700 I2C
- Corrected the From attribution
- Fixed incorrect DRAM setting for SPI and I2C controllers
- Refine code structure

v4:
- Add missing Signed-off-by
- Fix checkpatch.pl warnings
- Refine code structure
- Enable AST1700 support only after all devices are ready

v3:
- Add PWM model
- Integrate the SGPIO model
- Fix I2C test case failure
- Refine code structure

v2:
- Separate the AST1700 model into a standalone implementation
- Refine the mechanism for assigning the AST1700 board number

v1:
- Initial version
---

Cédric Le Goater (1):
   hw/misc: Add basic Aspeed PWM model

Kane-Chen-AS (21):
   hw/misc: Add LTPI controller
   hw/arm/aspeed: Attach LTPI controller to AST27X0 platform
   hw/arm/aspeed: Add AST1700 LTPI expander device model
   hw/arm/aspeed: Integrate AST1700 device into AST27X0
   hw/arm/aspeed: Integrate interrupt controller for AST1700
   hw/arm/aspeed: Attach LTPI controller to AST1700 model
   hw/arm/aspeed: Attach UART device to AST1700 model
   hw/arm/aspeed: Attach SRAM device to AST1700 model
   hw/arm/aspeed: Attach SPI device to AST1700 model
   hw/arm/aspeed: Attach ADC device to AST1700 model
   hw/arm/aspeed: Attach SCU device to AST1700 model
   hw/arm/aspeed: Attach GPIO device to AST1700 model
   hw/arm/aspeed: Introduce 'bus-label' property for AST1700 SoC
   hw/arm/aspeed: attach I2C device to AST1700 model
   hw/arm/aspeed: Attach WDT device to AST1700 model
   hw/arm/aspeed: Attach PWM device to AST1700 model
   hw/arm/aspeed: Attach SGPIOM device to AST1700 model
   hw/arm/aspeed: Model AST1700 I3C block as unimplemented device
   hw/arm/aspeed: Enable AST1700 IO expander support
   test/functional/aarch64: Parameterize I2C bus ID in AST2700 test
   test/functional/aarch64: Add I2C test for AST1700 IO expanders

  include/hw/arm/aspeed_ast1700.h               |  55 ++++
  include/hw/arm/aspeed_soc.h                   |  25 +-
  include/hw/intc/aspeed_intc.h                 |   2 +
  include/hw/misc/aspeed_ltpi.h                 |  33 +++
  include/hw/misc/aspeed_pwm.h                  |  31 ++
  hw/arm/aspeed_ast1700.c                       | 280 ++++++++++++++++++
  hw/arm/aspeed_ast27x0.c                       | 170 ++++++++++-
  hw/intc/aspeed_intc.c                         |  60 ++++
  hw/misc/aspeed_ltpi.c                         | 193 ++++++++++++
  hw/misc/aspeed_pwm.c                          | 121 ++++++++
  hw/arm/meson.build                            |   1 +
  hw/misc/meson.build                           |   2 +
  hw/misc/trace-events                          |   4 +
  .../functional/aarch64/test_aspeed_ast2700.py |  52 +++-
  14 files changed, 999 insertions(+), 30 deletions(-)
  create mode 100644 include/hw/arm/aspeed_ast1700.h
  create mode 100644 include/hw/misc/aspeed_ltpi.h
  create mode 100644 include/hw/misc/aspeed_pwm.h
  create mode 100644 hw/arm/aspeed_ast1700.c
  create mode 100644 hw/misc/aspeed_ltpi.c
  create mode 100644 hw/misc/aspeed_pwm.c



Reply via email to