From: Bernhard Beschow <[email protected]>
The i.MX 6 SoC features uSDHC controllers which are the successors of eSDHC.
Fix the naming to make this clear.
Fixes: ec46eaa83a3c ("i.MX: Add i.MX6 SOC implementation.")
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Tested-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
include/hw/arm/fsl-imx6.h | 4 ++--
hw/arm/fsl-imx6.c | 16 ++++++++--------
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index 5520473ba0b..bb866994dff 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -46,7 +46,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslIMX6State, FSL_IMX6)
#define FSL_IMX6_NUM_EPITS 2
#define FSL_IMX6_NUM_I2CS 3
#define FSL_IMX6_NUM_GPIOS 7
-#define FSL_IMX6_NUM_ESDHCS 4
+#define FSL_IMX6_NUM_USDHCS 4
#define FSL_IMX6_NUM_ECSPIS 5
#define FSL_IMX6_NUM_WDTS 2
#define FSL_IMX6_NUM_USB_PHYS 2
@@ -67,7 +67,7 @@ struct FslIMX6State {
IMXEPITState epit[FSL_IMX6_NUM_EPITS];
IMXI2CState i2c[FSL_IMX6_NUM_I2CS];
IMXGPIOState gpio[FSL_IMX6_NUM_GPIOS];
- SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS];
+ SDHCIState usdhc[FSL_IMX6_NUM_USDHCS];
IMXSPIState spi[FSL_IMX6_NUM_ECSPIS];
IMX2WdtState wdt[FSL_IMX6_NUM_WDTS];
IMXUSBPHYState usbphy[FSL_IMX6_NUM_USB_PHYS];
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 46967b74882..39667c4a49a 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -79,9 +79,9 @@ static void fsl_imx6_init(Object *obj)
object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO);
}
- for (i = 0; i < FSL_IMX6_NUM_ESDHCS; i++) {
+ for (i = 0; i < FSL_IMX6_NUM_USDHCS; i++) {
snprintf(name, NAME_SIZE, "sdhc%d", i + 1);
- object_initialize_child(obj, name, &s->esdhc[i], TYPE_IMX_USDHC);
+ object_initialize_child(obj, name, &s->usdhc[i], TYPE_IMX_USDHC);
}
for (i = 0; i < FSL_IMX6_NUM_USB_PHYS; i++) {
@@ -311,11 +311,11 @@ static void fsl_imx6_realize(DeviceState *dev, Error
**errp)
}
/* Initialize all SDHC */
- for (i = 0; i < FSL_IMX6_NUM_ESDHCS; i++) {
+ for (i = 0; i < FSL_IMX6_NUM_USDHCS; i++) {
static const struct {
hwaddr addr;
unsigned int irq;
- } esdhc_table[FSL_IMX6_NUM_ESDHCS] = {
+ } esdhc_table[FSL_IMX6_NUM_USDHCS] = {
{ FSL_IMX6_uSDHC1_ADDR, FSL_IMX6_uSDHC1_IRQ },
{ FSL_IMX6_uSDHC2_ADDR, FSL_IMX6_uSDHC2_IRQ },
{ FSL_IMX6_uSDHC3_ADDR, FSL_IMX6_uSDHC3_IRQ },
@@ -323,13 +323,13 @@ static void fsl_imx6_realize(DeviceState *dev, Error
**errp)
};
/* UHS-I SDIO3.0 SDR104 1.8V ADMA */
- object_property_set_uint(OBJECT(&s->esdhc[i]), "capareg",
+ object_property_set_uint(OBJECT(&s->usdhc[i]), "capareg",
IMX6_ESDHC_CAPABILITIES, &error_abort);
- if (!sysbus_realize(SYS_BUS_DEVICE(&s->esdhc[i]), errp)) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->usdhc[i]), errp)) {
return;
}
- sysbus_mmio_map(SYS_BUS_DEVICE(&s->esdhc[i]), 0, esdhc_table[i].addr);
- sysbus_connect_irq(SYS_BUS_DEVICE(&s->esdhc[i]), 0,
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->usdhc[i]), 0, esdhc_table[i].addr);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->usdhc[i]), 0,
qdev_get_gpio_in(gic, esdhc_table[i].irq));
}
--
2.52.0
