The NVIC should always be a little-endian device as big-endian behaviour is a function of the current CPU configuration not the system as a whole. Indeed the Armv8-M architecture reference manual declares:
All accesses to the Private Peripheral Bus (PPB) are always little-endian, which means that the PE assumes a little-endian arrangement of the PPB registers. This should have no functional effect as the NVIC cannot be instantiated on a BE system but will help the single binary efforts. Signed-off-by: Alex Bennée <[email protected]> --- hw/intc/armv7m_nvic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 3a31eb56f36..28b34e99446 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -2467,7 +2467,7 @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr addr, static const MemoryRegionOps nvic_sysreg_ops = { .read_with_attrs = nvic_sysreg_read, .write_with_attrs = nvic_sysreg_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static int nvic_post_load(void *opaque, int version_id) -- 2.47.3
