On Wed, Jan 21, 2026 at 01:32:55PM +0000, Jonathan Cameron wrote: > On Wed, 21 Jan 2026 12:25:17 +0100 > Mauro Carvalho Chehab <[email protected]> wrote: > > > Add a logic to do PCIe BUS error injection. > > > > On Linux Kernel, despite CPER_SEC_PCI_X_BUS macro is defined for such > > event, ghes.c doesn't implement support for it yet: > > > > [16950.077494] {26}[Hardware Error]: Hardware error from APEI Generic > > Hardware Error Source: 1 > > [16950.077866] {26}[Hardware Error]: event severity: recoverable > > [16950.078118] {26}[Hardware Error]: Error 0, type: recoverable > > [16950.078444] {26}[Hardware Error]: section type: unknown, > > c5753963-3b84-4095-bf78-eddad3f9c9dd > > [16950.078800] {26}[Hardware Error]: section length: 0x48 > > [16950.079069] {26}[Hardware Error]: 00000000: 00000000 00000000 00000000 > > 00000000 ................ > > [16950.079442] {26}[Hardware Error]: 00000010: 00000001 00000000 00000000 > > 00000000 ................ > > [16950.079811] {26}[Hardware Error]: 00000020: 00000000 00000000 00000000 > > 00000000 ................ > > [16950.080181] {26}[Hardware Error]: 00000030: 00000000 00000000 00000000 > > 00000000 ................ > > [16950.080538] {26}[Hardware Error]: 00000040: 00000000 00000000 > > ........ > > > > Signed-off-by: Mauro Carvalho Chehab <[email protected]> > > LGTM. Bit surprised Linux doesn't decode it but fair enough. > Seems a bit unlikely it ever will given this seems not to cover PCIe > which has it's own records.
Yeah, me too. If I got it right from specs, this one is related to the PCIe bus controller, while the other one is for the PCIe device. Perhaps in practice vendors are using hardware-first approach for the PCI controller. > > Reviewed-by: Jonathan Cameron <[email protected]> -- Thanks, Mauro
