From: Alex Bennée <[email protected]> The GIC should always be a little-endian device as big-endian behaviour is a function of the current CPU configuration not the system as a whole. This should have no functional effect as the GIC cannot be instantiated on a BE system but will help the single binary efforts.
Signed-off-by: Alex Bennée <[email protected]> Reviewed-by: Peter Maydell <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Message-id: [email protected] Signed-off-by: Peter Maydell <[email protected]> --- hw/intc/arm_gicv3.c | 4 ++-- hw/intc/arm_gicv3_its.c | 4 ++-- hw/intc/arm_gicv3_its_common.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/intc/arm_gicv3.c b/hw/intc/arm_gicv3.c index 6059ce926a..542f81ea49 100644 --- a/hw/intc/arm_gicv3.c +++ b/hw/intc/arm_gicv3.c @@ -417,7 +417,7 @@ static const MemoryRegionOps gic_ops[] = { { .read_with_attrs = gicv3_dist_read, .write_with_attrs = gicv3_dist_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, .valid.min_access_size = 1, .valid.max_access_size = 8, .impl.min_access_size = 1, @@ -426,7 +426,7 @@ static const MemoryRegionOps gic_ops[] = { { .read_with_attrs = gicv3_redist_read, .write_with_attrs = gicv3_redist_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, .valid.min_access_size = 1, .valid.max_access_size = 8, .impl.min_access_size = 1, diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index cce3486d74..b639c03b67 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1906,7 +1906,7 @@ static const MemoryRegionOps gicv3_its_control_ops = { .valid.max_access_size = 8, .impl.min_access_size = 4, .impl.max_access_size = 8, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static const MemoryRegionOps gicv3_its_translation_ops = { @@ -1916,7 +1916,7 @@ static const MemoryRegionOps gicv3_its_translation_ops = { .valid.max_access_size = 4, .impl.min_access_size = 2, .impl.max_access_size = 4, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void gicv3_arm_its_realize(DeviceState *dev, Error **errp) diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c index e946e3fb87..9fc51ad1e0 100644 --- a/hw/intc/arm_gicv3_its_common.c +++ b/hw/intc/arm_gicv3_its_common.c @@ -97,7 +97,7 @@ static MemTxResult gicv3_its_trans_write(void *opaque, hwaddr offset, static const MemoryRegionOps gicv3_its_trans_ops = { .read_with_attrs = gicv3_its_trans_read, .write_with_attrs = gicv3_its_trans_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops, -- 2.47.3
