On 2/5/26 18:22, Paolo Bonzini wrote:
Il mer 4 feb 2026, 21:46 Richard Henderson <[email protected] <mailto:[email protected]>> ha scritto:On 2/4/26 20:41, Paolo Bonzini wrote: > This is primarily for x86. > > (1) movz is 2 operand, so that may avoid clobbering an input, > (2) movz is 3-4 byte whereas and r/i32 is 6-7 byte. > > Because of these, there's a comment somewhere that says we'll prefer extract over and > (perhaps in tcg_gen_andi_* or fold_and). IIRC this also happens to simplify ppc and > s390x > insn selection (and vs rotate and mask). AFAIK, no other hosts are penalized. > > > I think it would be better to pick a canonical form for AND with 2^n-1 and handle > conversion to extract (like PPC rotates or movz) in the backend. > > Picking AND as the canonical form also avoids makes the macros for extract validity > simpler too; adding an extra constraint for immediate 2^n-1 is easier and it generalizes > to other PPC rotate and mask cases. Picking AND means we have to use "r,0,ri" for x86, losing register allocation flexibility.Then could you wrap the target specific extract_valid with one that allows ofs == 0 if AND allows the immediate 2^len-1? That would also simplify this series.
I don't understand your suggestion here. r~
