On 2/6/26 07:02, Alex Bennée wrote:
@@ -3817,10 +3821,15 @@ static void do_hcr_write(CPUARMState *env, uint64_t value, uint64_t valid_mask) /* Clear RES0 bits. */ value &= valid_mask;- /* RW is RAO/WI if EL1 is AArch64 only */- if (arm_feature(env, ARM_FEATURE_AARCH64) && - !cpu_isar_feature(aa64_aa32_el1, cpu)) { - value |= HCR_RW; + if (arm_feature(env, ARM_FEATURE_AARCH64)) { + /* RW is RAO/WI if EL1 is AArch64 only */ + if (!cpu_isar_feature(aa64_aa32_el1, cpu)) { + value |= HCR_RW; + } + /* Strictly E2H is RES1 unless FEAT_E2H0 relaxes the requirement */ + if (!cpu_isar_feature(aa64_e2h0, cpu)) { + value |= HCR_E2H; + } }
Reset value of hcr_el2 should have E2H set too. I think you want something like cpacr_reset(). r~
