Hi Clement, Could I take it as a formal "Reviewed-by: Clement Mathieu--Drif <[email protected]>" or not?
Thanks Zhenzhong >-----Original Message----- >From: Clement Mathieu--Drif <[email protected]> >Subject: Re: [RFC PATCH 06/14] intel_iommu: Export some functions > >lgtm > >On Wed, 2026-02-04 at 22:11 -0500, Zhenzhong Duan wrote: >> Export some functions for accel code usages. Inline functions and MACROs >> are moved to internal header files. Then accel code in following patches >> could access them. >> >> Signed-off-by: Zhenzhong Duan ><[[email protected]](mailto:[email protected])> >> --- >> hw/i386/intel_iommu_internal.h | 31 +++++++++++++++++++++++++ >> hw/i386/intel_iommu.c | 42 ++++++++-------------------------- >> 2 files changed, 40 insertions(+), 33 deletions(-) >> >> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h >> index 71cb3b662e..6753a20ca4 100644 >> --- a/hw/i386/intel_iommu_internal.h >> +++ b/hw/i386/intel_iommu_internal.h >> @@ -615,6 +615,12 @@ typedef struct VTDRootEntry VTDRootEntry; >> #define VTD_SM_CONTEXT_ENTRY_RSVD_VAL1 0xffffffffffe00000ULL >> #define VTD_SM_CONTEXT_ENTRY_PRE 0x10ULL >> >> +/* context entry operations */ >> +#define VTD_CE_GET_PASID_DIR_TABLE(ce) \ >> + ((ce)->val[0] & VTD_PASID_DIR_BASE_ADDR_MASK) >> +#define VTD_CE_GET_PRE(ce) \ >> + ((ce)->val[0] & VTD_SM_CONTEXT_ENTRY_PRE) >> + >> typedef struct VTDPASIDCacheInfo { >> uint8_t type; >> uint16_t did; >> @@ -733,4 +739,29 @@ static inline bool vtd_pe_pgtt_is_fst(VTDPASIDEntry >*pe) >> { >> return (VTD_SM_PASID_ENTRY_PGTT(pe) == VTD_SM_PASID_ENTRY_FST); >> } >> + >> +static inline bool vtd_pdire_present(VTDPASIDDirEntry *pdire) >> +{ >> + return pdire->val & 1; >> +} >> + >> +static inline bool vtd_pe_present(VTDPASIDEntry *pe) >> +{ >> + return pe->val[0] & VTD_PASID_ENTRY_P; >> +} >> + >> +static inline int vtd_pasid_entry_compare(VTDPASIDEntry *p1, VTDPASIDEntry >*p2) >> +{ >> + return memcmp(p1, p2, sizeof(*p1)); >> +} >> + >> +int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base, uint32_t pasid, >> + VTDPASIDDirEntry *pdire); >> +int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s, uint32_t pasid, >> + dma_addr_t addr, VTDPASIDEntry *pe); >> +int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num, >> + uint8_t devfn, VTDContextEntry *ce); >> +int vtd_ce_get_pasid_entry(IntelIOMMUState *s, VTDContextEntry *ce, >> + VTDPASIDEntry *pe, uint32_t pasid); >> +VTDAddressSpace *vtd_get_as_by_sid(IntelIOMMUState *s, uint16_t sid); >> #endif >> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c >> index 916eb0af5a..ab52a688c5 100644 >> --- a/hw/i386/intel_iommu.c >> +++ b/hw/i386/intel_iommu.c >> @@ -42,12 +42,6 @@ >> #include "migration/vmstate.h" >> #include "trace.h" >> >> -/* context entry operations */ >> -#define VTD_CE_GET_PASID_DIR_TABLE(ce) \ >> - ((ce)->val[0] & VTD_PASID_DIR_BASE_ADDR_MASK) >> -#define VTD_CE_GET_PRE(ce) \ >> - ((ce)->val[0] & VTD_SM_CONTEXT_ENTRY_PRE) >> - >> /* >> * Paging mode for first-stage translation (VTD spec Figure 9-6) >> * 00: 4-level paging, 01: 5-level paging >> @@ -831,18 +825,12 @@ static inline bool >vtd_pe_type_check(IntelIOMMUState *s, VTDPASIDEntry *pe) >> } >> } >> >> -static inline bool vtd_pdire_present(VTDPASIDDirEntry *pdire) >> -{ >> - return pdire->val & 1; >> -} >> - >> /** >> * Caller of this function should check present bit if wants >> * to use pdir entry for further usage except for fpd bit check. >> */ >> -static int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base, >> - uint32_t pasid, >> - VTDPASIDDirEntry *pdire) >> +int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base, uint32_t pasid, >> + VTDPASIDDirEntry *pdire) >> { >> uint32_t index; >> dma_addr_t addr, entry_size; >> @@ -860,15 +848,8 @@ static int vtd_get_pdire_from_pdir_table(dma_addr_t >pasid_dir_base, >> return 0; >> } >> >> -static inline bool vtd_pe_present(VTDPASIDEntry *pe) >> -{ >> - return pe->val[0] & VTD_PASID_ENTRY_P; >> -} >> - >> -static int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s, >> - uint32_t pasid, >> - dma_addr_t addr, >> - VTDPASIDEntry *pe) >> +int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s, uint32_t pasid, >> + dma_addr_t addr, VTDPASIDEntry *pe) >> { >> uint8_t pgtt; >> uint32_t index; >> @@ -954,8 +935,8 @@ static int >vtd_get_pe_from_pasid_table(IntelIOMMUState *s, >> return 0; >> } >> >> -static int vtd_ce_get_pasid_entry(IntelIOMMUState *s, VTDContextEntry *ce, >> - VTDPASIDEntry *pe, uint32_t pasid) >> +int vtd_ce_get_pasid_entry(IntelIOMMUState *s, VTDContextEntry *ce, >> + VTDPASIDEntry *pe, uint32_t pasid) >> { >> dma_addr_t pasid_dir_base; >> >> @@ -1531,8 +1512,8 @@ static int vtd_ce_pasid_0_check(IntelIOMMUState *s, >VTDContextEntry *ce) >> } >> >> /* Map a device to its corresponding domain (context-entry) */ >> -static int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num, >> - uint8_t devfn, VTDContextEntry *ce) >> +int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num, >> + uint8_t devfn, VTDContextEntry *ce) >> { >> VTDRootEntry re; >> int ret_fr; >> @@ -1894,7 +1875,7 @@ static VTDAddressSpace >*vtd_get_as_by_sid_and_pasid(IntelIOMMUState *s, >> vtd_find_as_by_sid_and_pasid, &key); >> } >> >> -static VTDAddressSpace *vtd_get_as_by_sid(IntelIOMMUState *s, uint16_t sid) >> +VTDAddressSpace *vtd_get_as_by_sid(IntelIOMMUState *s, uint16_t sid) >> { >> return vtd_get_as_by_sid_and_pasid(s, sid, PCI_NO_PASID); >> } >> @@ -3112,11 +3093,6 @@ static inline int >vtd_dev_get_pe_from_pasid(VTDAddressSpace *vtd_as, >> return vtd_ce_get_pasid_entry(s, &ce, pe, vtd_as->pasid); >> } >> >> -static int vtd_pasid_entry_compare(VTDPASIDEntry *p1, VTDPASIDEntry *p2) >> -{ >> - return memcmp(p1, p2, sizeof(*p1)); >> -} >> - >> /* Update or invalidate pasid cache based on the pasid entry in guest >> memory. >*/ >> static void vtd_pasid_cache_sync_locked(gpointer key, gpointer value, >> gpointer user_data)
