On Fri, Feb 6, 2026 at 6:45 PM Igor Mammedov <[email protected]> wrote: > > Signed-off-by: Igor Mammedov <[email protected]>
Other than what mentioned below, Reviewed-by: Ani Sinha <[email protected]> > --- > hw/watchdog/sbsa_gwdt.c | 8 ++++++++ > hw/watchdog/trace-events | 9 +++++++++ > 2 files changed, 17 insertions(+) > > diff --git a/hw/watchdog/sbsa_gwdt.c b/hw/watchdog/sbsa_gwdt.c > index 7ade5c6f18..d159e61c34 100644 > --- a/hw/watchdog/sbsa_gwdt.c > +++ b/hw/watchdog/sbsa_gwdt.c > @@ -24,6 +24,7 @@ > #include "migration/vmstate.h" > #include "qemu/log.h" > #include "qemu/module.h" > +#include "trace.h" > > static const VMStateDescription vmstate_sbsa_gwdt = { > .name = "sbsa-gwdt", > @@ -62,6 +63,7 @@ static uint64_t sbsa_gwdt_rread(void *opaque, hwaddr addr, > unsigned int size) > qemu_log_mask(LOG_GUEST_ERROR, "bad address in refresh frame read :" > " 0x%x\n", (int)addr); > } > + trace_sbsa_gwdt_refresh_read(addr, ret); > return ret; > } > > @@ -93,6 +95,7 @@ static uint64_t sbsa_gwdt_read(void *opaque, hwaddr addr, > unsigned int size) > qemu_log_mask(LOG_GUEST_ERROR, "bad address in control frame read :" > " 0x%x\n", (int)addr); > } > + trace_sbsa_gwdt_control_read(addr, ret); > return ret; > } > > @@ -127,6 +130,7 @@ static void sbsa_gwdt_rwrite(void *opaque, hwaddr offset, > uint64_t data, > unsigned size) { > SBSA_GWDTState *s = SBSA_GWDT(opaque); > > + trace_sbsa_gwdt_refresh_write(offset, data); ^^^^^ this is 64 bit. > if (offset == SBSA_GWDT_WRR) { > s->wcs &= ~(SBSA_GWDT_WCS_WS0 | SBSA_GWDT_WCS_WS1); > > @@ -141,6 +145,7 @@ static void sbsa_gwdt_write(void *opaque, hwaddr offset, > uint64_t data, > unsigned size) { > SBSA_GWDTState *s = SBSA_GWDT(opaque); > > + trace_sbsa_gwdt_control_write(offset, data); Same here ... > switch (offset) { > case SBSA_GWDT_WCS: > s->wcs = data & SBSA_GWDT_WCS_EN; > @@ -180,6 +185,7 @@ static void wdt_sbsa_gwdt_reset(DeviceState *dev) > { > SBSA_GWDTState *s = SBSA_GWDT(dev); > > + trace_sbsa_gwdt_reset(); > timer_del(s->timer); > > s->wcs = 0; > @@ -196,10 +202,12 @@ static void sbsa_gwdt_timer_sysinterrupt(void *opaque) > > if (!(s->wcs & SBSA_GWDT_WCS_WS0)) { > s->wcs |= SBSA_GWDT_WCS_WS0; > + trace_sbsa_gwdt_ws0_asserted(); > sbsa_gwdt_update_timer(s, TIMEOUT_REFRESH); > qemu_set_irq(s->irq, 1); > } else { > s->wcs |= SBSA_GWDT_WCS_WS1; > + trace_sbsa_gwdt_ws1_asserted(); > qemu_log_mask(CPU_LOG_RESET, "Watchdog timer expired.\n"); > /* > * Reset the watchdog only if the guest gets notified about > diff --git a/hw/watchdog/trace-events b/hw/watchdog/trace-events > index ad3be1e9bd..5be430fb9e 100644 > --- a/hw/watchdog/trace-events > +++ b/hw/watchdog/trace-events > @@ -33,3 +33,12 @@ spapr_watchdog_expired(uint64_t num, unsigned action) > "num=%" PRIu64 " action=%u > # watchdog.c > watchdog_perform_action(unsigned int action) "action=%u" > watchdog_set_action(unsigned int action) "action=%u" > + > +#sbsa_gwdt.c > +sbsa_gwdt_refresh_read(uint64_t addr, uint32_t value) "[0x%" PRIu64 "] -> > 0x%" PRIu32 > +sbsa_gwdt_refresh_write(uint64_t addr, uint32_t value) "[0x%" PRIu64 "] <- > 0x%" PRIu32 ^^^^^^^ This needs to be 64 bit. > +sbsa_gwdt_control_read(uint64_t addr, uint32_t value) "[0x%" PRIu64 "] -> > 0x%" PRIu32 > +sbsa_gwdt_control_write(uint64_t addr, uint32_t value) "[0x%" PRIu64 "] <- > 0x%" PRIu32 Same here . > +sbsa_gwdt_ws0_asserted(void) "WS0 signal is asserted" > +sbsa_gwdt_ws1_asserted(void) "WS1 signal is asserted" > +sbsa_gwdt_reset(void) "reset watchdog to defaut state" ^^^^^^ typo.
