Change kvm_put_apic_state() and kvm_get_apic_state() to accept a void * instead of struct kvm_lapic_state *, so they can work with both the legacy 1KB and the 4KB LAPIC2 register layout in later patches.
Update kvm_apic_set_reg() and kvm_apic_get_reg() to take void * with explicit char * casts for correct pointer arithmetic. This is a preparation for LAPIC2 ioctl space and extended LVT for AMD changes. No functional change intended. Signed-off-by: Manali Shukla <[email protected]> --- hw/i386/kvm/apic.c | 48 +++++++++++++++++++------------------- target/i386/kvm/kvm_i386.h | 2 +- 2 files changed, 25 insertions(+), 25 deletions(-) diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c index 1be9bfe36e..c1866c3939 100644 --- a/hw/i386/kvm/apic.c +++ b/hw/i386/kvm/apic.c @@ -19,48 +19,48 @@ #include "kvm/kvm_i386.h" #include "kvm/tdx.h" -static inline void kvm_apic_set_reg(struct kvm_lapic_state *kapic, - int reg_id, uint32_t val) +static inline void kvm_apic_set_reg(void *regs, int reg_id, uint32_t val) { - *((uint32_t *)(kapic->regs + (reg_id << 4))) = val; + *((uint32_t *)((char *)regs + (reg_id << 4))) = val; } -static inline uint32_t kvm_apic_get_reg(struct kvm_lapic_state *kapic, - int reg_id) +static inline uint32_t kvm_apic_get_reg(void *regs, int reg_id) { - return *((uint32_t *)(kapic->regs + (reg_id << 4))); + return *((uint32_t *)((char *)regs + (reg_id << 4))); } -static void kvm_put_apic_state(APICCommonState *s, struct kvm_lapic_state *kapic) +static void kvm_put_apic_state(APICCommonState *s, void *regs) { int i; - memset(kapic, 0, sizeof(*kapic)); + memset(regs, 0, KVM_APIC_REG_SIZE); + if (kvm_has_x2apic_api() && s->apicbase & MSR_IA32_APICBASE_EXTD) { - kvm_apic_set_reg(kapic, 0x2, s->initial_apic_id); + kvm_apic_set_reg(regs, 0x2, s->initial_apic_id); } else { - kvm_apic_set_reg(kapic, 0x2, s->id << 24); + kvm_apic_set_reg(regs, 0x2, s->id << 24); } - kvm_apic_set_reg(kapic, 0x8, s->tpr); - kvm_apic_set_reg(kapic, 0xd, s->log_dest << 24); - kvm_apic_set_reg(kapic, 0xe, s->dest_mode << 28 | 0x0fffffff); - kvm_apic_set_reg(kapic, 0xf, s->spurious_vec); + kvm_apic_set_reg(regs, 0x8, s->tpr); + kvm_apic_set_reg(regs, 0xd, s->log_dest << 24); + kvm_apic_set_reg(regs, 0xe, s->dest_mode << 28 | 0x0fffffff); + kvm_apic_set_reg(regs, 0xf, s->spurious_vec); for (i = 0; i < 8; i++) { - kvm_apic_set_reg(kapic, 0x10 + i, s->isr[i]); - kvm_apic_set_reg(kapic, 0x18 + i, s->tmr[i]); - kvm_apic_set_reg(kapic, 0x20 + i, s->irr[i]); + kvm_apic_set_reg(regs, 0x10 + i, s->isr[i]); + kvm_apic_set_reg(regs, 0x18 + i, s->tmr[i]); + kvm_apic_set_reg(regs, 0x20 + i, s->irr[i]); } - kvm_apic_set_reg(kapic, 0x28, s->esr); - kvm_apic_set_reg(kapic, 0x30, s->icr[0]); - kvm_apic_set_reg(kapic, 0x31, s->icr[1]); + kvm_apic_set_reg(regs, 0x28, s->esr); + kvm_apic_set_reg(regs, 0x30, s->icr[0]); + kvm_apic_set_reg(regs, 0x31, s->icr[1]); for (i = 0; i < APIC_LVT_NB; i++) { - kvm_apic_set_reg(kapic, 0x32 + i, s->lvt[i]); + kvm_apic_set_reg(regs, 0x32 + i, s->lvt[i]); } - kvm_apic_set_reg(kapic, 0x38, s->initial_count); - kvm_apic_set_reg(kapic, 0x3e, s->divide_conf); + kvm_apic_set_reg(regs, 0x38, s->initial_count); + kvm_apic_set_reg(regs, 0x3e, s->divide_conf); + } -void kvm_get_apic_state(DeviceState *dev, struct kvm_lapic_state *kapic) +void kvm_get_apic_state(DeviceState *dev, void *kapic) { APICCommonState *s = APIC_COMMON(dev); int i, v; diff --git a/target/i386/kvm/kvm_i386.h b/target/i386/kvm/kvm_i386.h index 5f83e8850a..ecf21c2cc1 100644 --- a/target/i386/kvm/kvm_i386.h +++ b/target/i386/kvm/kvm_i386.h @@ -56,7 +56,7 @@ bool kvm_has_adjust_clock_stable(void); bool kvm_has_exception_payload(void); void kvm_synchronize_all_tsc(void); -void kvm_get_apic_state(DeviceState *d, struct kvm_lapic_state *kapic); +void kvm_get_apic_state(DeviceState *d, void *kapic); void kvm_put_apicbase(X86CPU *cpu, uint64_t value); bool kvm_has_x2apic_api(void); -- 2.43.0
