On 2/19/26 9:18 AM, Alex Bennée wrote:
Currently the cpu_reset() in mips_cpu_realizefn() hides an implicit
sequencing requirement when setting gcr_base. Without it we barf
because we end up setting the region between 0x0-0x000000001fbfffff
which trips over a qtest that accesses the GCR during "memsave 0 4096
/dev/null".
By moving to the reset phase we have to drop the property lest we are
admonished for "Attempting to set...after it was realized" but there
doesn't seem to be a need to expose the property anyway.
NB: it would be safer if I could guarantee the place in the reset tree
but I haven't quite grokked how to do that yet. Currently I see this
sequence when testing:
env MALLOC_PERTURB_=43
G_TEST_DBUS_DAEMON=/home/alex/lsrc/qemu.git/tests/dbus-vmstate-daemon.sh
UBSAN_OPTIONS=halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1
QTEST_QEMU_IMG=./qemu-img QTEST_QEMU_BINARY=./qemu-system-mips64el
SPEED=thorough MESON_TEST_ITERATION=1
MSAN_OPTIONS=halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1
PYTHON=/home/alex/lsrc/qemu.git/builds/all/pyvenv/bin/python3
QTEST_QEMU_STORAGE_DAEMON_BINARY=./storage-daemon/qemu-storage-daemon
ASAN_OPTIONS=halt_on_error=1:abort_on_error=1:print_summary=1 G_TEST_SLOW=1
RUST_BACKTRACE=1 /home/alex/lsrc/qemu.git/builds/all/tests/qtest/test-hmp --tap
-p /mips64el/hmp/boston
TAP version 14
# random seed: R02S0d3b1a4f1aef5198107851bdee539e7d
# Start of mips64el tests
# Start of hmp tests
# starting QEMU: exec ./qemu-system-mips64el -qtest
unix:/tmp/qtest-530181.sock -qtest-log /dev/null -chardev
socket,path=/tmp/qtest-530181.qmp,id=char0 -mon chardev=char0,mode=control
-display none -audio none -run-with exit-with-parent=on -S -M boston -accel
qtest
main_cpu_reset: dbg
mips_gcr_reset: dbg
mps_reset_exit: dbg
ok 1 /mips64el/hmp/boston
# End of hmp tests
# End of mips64el tests
1..1
Cc: Peter Maydell <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Alex Bennée <[email protected]>
---
v2
- use proper 3-phase reset
---
include/hw/mips/cps.h | 14 +++++++++++++-
hw/mips/cps.c | 26 +++++++++++++++++---------
hw/misc/mips_cmgcr.c | 1 -
3 files changed, 30 insertions(+), 11 deletions(-)
Reviewed-by: Pierrick Bouvier <[email protected]>
